Abstract: A system and method for implementing dynamic spur avoidance in a high speed receiver environment is provided. For a plurality of radio frequency (RF) input signal ranges, a range of intermediate frequency (IF) signals and a noise floor for each IF signal is determined. An identification of spurs that will affect the noise floor is also determined from a look up table for each range of the RF inputs. A frequency plan that sets local oscillator and constituent oscillator signals is selected such that the IF signals generated from the RF input will avoid lower order spurious responses of the identified spurs within the IF signal range.

Abstract: A high speed receiver is provided using two parallel processing paths to enable rapid variable gain control. The parallel processing paths include a first processing path using a high resolution Discrete Fourier Transform (DFT), and a second processing path using a reduced DFT requiring fewer samples than the high resolution DFT. An initial sample of the data is processed using the second processing path with the reduced DFT by comparing a Fourier transform of the initial sample with predetermined threshold values. As a result of the comparison of the Fourier transform of the initial sample with the predetermined threshold values, a gain determination block determines whether a requirement exists for gain ranging. If gain ranging is needed, the gain of the data signal is adjusted and the gain ranging process repeats.

Abstract: A method and apparatus comprising a sampler frequency converter having a first and a second diode. A local oscillator having a frequency F.sub.LO, a step recovery diode and a balun transformer are used for providing positive and negative sampling pulses to the diodes for sampling an input signal applied to the diodes having a frequency F.sub.IN. An output signal is provided by the diodes having a frequency F.sub.OUT which is defined by the relationship F.sub.OUT .vertline.F.sub.IN .+-.N.times.F.sub.LO .vertline. where N is an integer harmonic number 1, 2, 3 . . . and the output signal has an amplitude which varies as a function of (sin x)/x where x=F.sub.IN. A bandpass filter is provided which is responsive to the output signal for filtering a predetermined band of frequencies therefrom and a bias circuit is provided for forward biasing the diodes so that the frequency F.sub.

Abstract: A vector network analyzer comprising a circuit for measuring the real and imaginary components of the central spectral line in an RF pulse from a device-under-test is provided. The circuit comprises a modulator in response to a profiling pulse for modulating the amplitude of the RF pulse, mixers for down-converting the frequency of the amplitude modulated RF pulse, a narrow band filter for filtering the RF pulse having a bandwidth of 500 Hz and a synchronous detector responsive to the output of the crystal filter for providing a pair of dc outputs, which correspond to the real and imaginary components of the output of the device under test as the profiling pulse is shifted in time relative to the RF pulse.

Abstract: A method for eliminating subharmonic false locking in a sampler and frequency multiplier phase-locked-loop source locking system comprising the modification of a prior known algorithm for determining the frequency of the first local oscillator used for controlling the sampling of the output of a source voltage controlled oscillator. The frequency of the first local oscillator is determined using prior algorithms for determining the lowest usable harmonic number H and the highest usable first oscillator frequency which will maximize sampler efficiency and minimize local oscillator phase noise due to frequency multiplication. Thereater, the harmonic number H as thus determined is modified depending upon whether when divided by a multiplication factor M, where M is the factor by which the frequency of the VCO is multiplied, the remainder thereof is equal to 1/M, 2/M or zero. If the remainder of the division step is zero, then H is increased by one.