Patents by Inventor Petteri Palm

Petteri Palm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11903132
    Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: February 13, 2024
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
  • Publication number: 20240021512
    Abstract: A die package and method is disclosed. In one example, the die package includes a die having a first die contact on a first side and a second die contact on a second side opposite the first side, and insulating material laterally adjacent to the die. A metal structure substantially directly contacts the surface of the second die contact, wherein the metal structure is made of the same material as the second die contact. A first pad contact on the first side of the die electrically contacts the first die contact, and a second pad contact on the first side of the die electrically contacts the second die contact via the metal structure. The insulating material electrically insulates the metal structure from the first die contact.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 18, 2024
    Applicant: Infineon Technologies AG
    Inventor: Petteri PALM
  • Patent number: 11791255
    Abstract: A die package and method is disclosed. In one example, the die package includes a die having a first die contact on a first side and a second die contact on a second side opposite the first side, and insulating material laterally adjacent to the die. A metal structure substantially directly contacts the surface of the second die contact, wherein the metal structure is made of the same material as the second die contact. A first pad contact on the first side of the die electrically contacts the first die contact, and a second pad contact on the first side of the die electrically contacts the second die contact via the metal structure. The insulating material electrically insulates the metal structure from the first die contact.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: October 17, 2023
    Assignee: Infineon Technologies AG
    Inventor: Petteri Palm
  • Patent number: 11792941
    Abstract: The present publication discloses a circuit-board structure, including a conductor layer on an insulating material layer, and a conductor pattern on top of the conductor foil. A component is attached to the conductor foil and the conductor pattern, the component embedded at least in part in adhesive which attaches the component to the insulating material layer. A recess is formed in the conductor foil and the insulating material layer, and contact openings are in the insulating material layer at locations of contact areas of the component. Conductor material of the conductor foil is not present outside the conductor pattern, and the conductor foil is located between the conductor pattern and the insulating material layer.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: October 17, 2023
    Assignee: IMBERATEK, LLC
    Inventors: Risto Tuominen, Antti Iihola, Petteri Palm
  • Patent number: 11776882
    Abstract: A method includes: arranging a semiconductor device on a redistribution substrate, the device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, the redistribution substrate having an insulating board having a first major surface and a second major surface having solderable contact pads, so that the first power electrode is arranged on a first conductive pad and the control electrode is arranged on a second conductive pad on the first major surface; arranging a contact clip such that a web portion is arranged on the second power electrode and a peripheral rim portion is arranged on a third conductive pad on the first major surface; and electrically coupling the first power electrode, control electrode and peripheral rim portion to the respective conductive pads and electrically coupling the web portion to the second power electrode.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: October 3, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Markus Dinkel, Petteri Palm, Eung San Cho, Josef Hoeglauer, Ralf Otremba, Fabian Schnoy
  • Publication number: 20230253304
    Abstract: A semiconductor module is provided that includes a low side switch, a high side switch and a control chip. The low side switch and the high side switch are arranged laterally adjacent one another and coupled by a switch node connector to form a half bridge circuit. The switch node connector includes two or more branches that have an arrangement with respect to the low side switch and to the high side switch and that each have a cross-sectional area.
    Type: Application
    Filed: April 18, 2023
    Publication date: August 10, 2023
    Inventors: Sergey Yuferev, Robert Fehler, Angela Kessler, Gerhard Noebauer, Petteri Palm
  • Publication number: 20230240012
    Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
    Type: Application
    Filed: March 17, 2023
    Publication date: July 27, 2023
    Inventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
  • Publication number: 20230225055
    Abstract: The present invention relates to an electronic module. In particular, to an electronic module which includes one or more components embedded in an installation base. The electronic module can be a module like a circuit board, which includes several components, which are connected to each other electrically, through conducting structures manufactured in the module. The components can be passive components, microcircuits, semiconductor components, or other similar components. Components that are typically connected to a circuit board form one group of components. Another important group of components are components that are typically packaged for connection to a circuit board. The electronic modules to which the invention relates can, of course, also include other types of components.
    Type: Application
    Filed: March 16, 2023
    Publication date: July 13, 2023
    Inventors: Risto TUOMINEN, Petteri PALM
  • Publication number: 20230170319
    Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.
    Type: Application
    Filed: January 30, 2023
    Publication date: June 1, 2023
    Applicant: Infineon Technologies AG
    Inventors: Petteri Palm, Thorsten Scharf
  • Patent number: 11664304
    Abstract: A semiconductor module is provided that includes a low side switch, a high side switch and a control chip. The low side switch and the high side switch are arranged laterally adjacent one another and coupled by a switch node connector to form a half bridge circuit. The switch node connector includes two or more branches that have an arrangement with respect to the low side switch and to the high side switch and that each have a cross-sectional area. The arrangement and the cross-sectional area of the two or more branches are selected so as to homogenise the current density distribution within the switch node connector.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: May 30, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Sergey Yuferev, Robert Fehler, Angela Kessler, Gerhard Noebauer, Petteri Palm
  • Publication number: 20230127874
    Abstract: A power semiconductor system includes: a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board; and an inductor module attached to the power stage module and having an inductor electrically connected to an output node of the power stage module. The inductor includes windings patterned into a second printed circuit board of the inductor module.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 11632860
    Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: April 18, 2023
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
  • Publication number: 20230077139
    Abstract: A semiconductor package includes: an electrically insulating core and an electrically conductive first via extending through a periphery region of the core, the core having glass fibres interwoven with epoxy material and one or more regions where the glass fibres are exposed from the epoxy material; a power semiconductor die embedded in an opening in the core and having a first load terminal bond pad which faces a same direction as a first side of the core, a second load terminal bond pad which faces a same direction as a second side of the core, and a control terminal bond pad; a resin that encases the power semiconductor die; a first contact pad plated on the first via at the second side of the core; and a second contact pad plated on the first load terminal bond pad of the power semiconductor die at the first side of the core.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Inventors: Eung San Cho, Tomasz Naeve, Petteri Palm
  • Patent number: 11569186
    Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: January 31, 2023
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Thorsten Scharf
  • Patent number: 11539291
    Abstract: A method of manufacturing a power semiconductor system includes providing a power module having one or more power transistor dies and attaching an inductor module to the power module such that the inductor module is electrically connected to a node of the power module. The inductor module includes a substrate with a magnetic material and windings at one or more sides of the substrate. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: December 27, 2022
    Assignee: Infineon Technologies Austria AG
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 11532541
    Abstract: A semiconductor package includes: an insulating substrate having opposing first and second main sides; a power semiconductor die embedded in, and thinner than or a same thickness as, the substrate, and including a first load terminal bond pad at a first side which faces a same direction as the substrate first main side, a second load terminal bond pad at a second side which faces a same direction as the substrate second main side, and a control terminal bond pad; electrically conductive first vias extending through the substrate in a periphery region; a first metallization connecting the first load terminal bond pad to the first vias at the substrate first main side; solderable first contact pads at the substrate second main side and formed by the first vias; and a solderable second contact pad at the substrate second main side and formed by the second load terminal die bond pad.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: December 20, 2022
    Assignee: Infineon Technologies AG
    Inventors: Eung San Cho, Petteri Palm
  • Publication number: 20220399262
    Abstract: A die package and method is disclosed. In one example, the die package includes a die having a first die contact on a first side and a second die contact on a second side opposite the first side, and insulating material laterally adjacent to the die. A metal structure substantially directly contacts the surface of the second die contact, wherein the metal structure is made of the same material as the second die contact. A first pad contact on the first side of the die electrically contacts the first die contact, and a second pad contact on the first side of the die electrically contacts the second die contact via the metal structure. The insulating material electrically insulates the metal structure from the first die contact.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 15, 2022
    Applicant: Infineon Technologies AG
    Inventor: Petteri PALM
  • Publication number: 20220377901
    Abstract: An electronic device is disclosed. In one example, the electronic device comprises a carrier board, a metal inlay having a cavity and being arranged in the carrier board. At least one electronic component is arranged at least partially in the cavity and embedded in the carrier board. Electric contacts are located at a castellated edge of the carrier board.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 24, 2022
    Applicant: Infineon Technologies AG
    Inventors: Tomasz NAEVE, Urban MEDIC, Milad MOSTOFIZADEH, Petteri PALM
  • Publication number: 20220367350
    Abstract: In an embodiment, a semiconductor package includes a semiconductor device embedded in an insulating layer and having a first contact pad at a first surface of the semiconductor device. An outer contact pad is positioned on a lower surface of the insulating layer. A vertical redistribution structure electrically couples the first contact pad to the outer contact pad. The first contact pad has a plurality of first via sites. A first subset of the first via sites is occupied by first vias and a second subset of the first via sites remains unoccupied and forms a first via-free zone, such that the first vias are non-uniformly distributed over the first contact pad.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Inventors: Sergey Yuferev, Robert Fehler, Petteri Palm
  • Patent number: 11502012
    Abstract: Semiconductor packages described herein include a thermal capacitor designed to absorb transient heat pulses from a power semiconductor die and subsequently release the transient heat pulses to a surrounding environment, and/or a recessed pad feature. Corresponding methods of production are also described.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: November 15, 2022
    Assignee: Infineon Technologies AG
    Inventors: Eung San Cho, Tomasz Naeve, Petteri Palm