Patents by Inventor Petteri Palm

Petteri Palm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210127490
    Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
    Type: Application
    Filed: October 25, 2019
    Publication date: April 29, 2021
    Inventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
  • Publication number: 20210104957
    Abstract: A multiphase inverter apparatus includes an insulating substrate, a plurality of half bridge circuits and a phase output lead for each half bridge circuit. The substrate includes a conductive redistribution structure on a first surface and having at least one low voltage bus and at least one high voltage bus. Each half-bridge circuit is electrically coupled between a low voltage bus and a high voltage bus and includes: a packaged low side switch; a packaged high side switch; and a phase output electrically coupled with the respective phase output lead. The packaged low side and high side switches are arranged on the first surface of the substrate. The phase output lead is arranged on and electrically coupled to the packaged low side and high side switches such that the low side and high side switches are arranged vertically between the phase output lead and the first surface of the substrate.
    Type: Application
    Filed: October 1, 2020
    Publication date: April 8, 2021
    Inventors: Tomasz Naeve, Elvir Kahrimanovic, Petteri Palm
  • Publication number: 20210037654
    Abstract: The present invention relates to an electronic module. In particular, to an electronic module which includes one or more components embedded in an installation base. The electronic module can be a module like a circuit board, which includes several components, which are connected to each other electrically, through conducting structures manufactured in the module. The components can be passive components, microcircuits, semiconductor components, or other similar components. Components that are typically connected to a circuit board form one group of components. Another important group of components are components that are typically packaged for connection to a circuit board. The electronic modules to which the invention relates can, of course, also include other types of components.
    Type: Application
    Filed: August 28, 2020
    Publication date: February 4, 2021
    Inventors: Risto Tuominen, Petteri Palm
  • Publication number: 20210036610
    Abstract: A method of manufacturing a power semiconductor system includes providing a power module having one or more power transistor dies and attaching an inductor module to the power module such that the inductor module is electrically connected to a node of the power module. The inductor module includes a substrate with a magnetic material and windings at one or more sides of the substrate. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Application
    Filed: October 20, 2020
    Publication date: February 4, 2021
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 10903180
    Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: January 26, 2021
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Thorsten Scharf
  • Publication number: 20210020458
    Abstract: A method of manufacturing a chip package is provided. The method includes patterning at least one chip pad of a chip to form a patterned structure in the at least one chip pad, the patterned structure including at least one predefined recess, and encapsulating the chip with encapsulating material, thereby filling the at least one predefined recess.
    Type: Application
    Filed: July 17, 2020
    Publication date: January 21, 2021
    Inventor: Petteri Palm
  • Publication number: 20210005536
    Abstract: A semiconductor package includes a semiconductor die having a semiconductor device, and first and second contact pads arranged on opposite surfaces of the die. The semiconductor die is embedded in a dielectric layer. The semiconductor package also includes one or more first package contact pads and one or more second package contact pads arranged on a first major surface of the semiconductor package. The first contact pad of the die is coupled to the one or more first package contact pads, and the second contact pad of the die is coupled to the one or more second package contact pads. In operation, the semiconductor device causes a current path between the first contact pad and the second contact pad. The package contact pads are arranged on the first major surface of the semiconductor package to provide multiple non-parallel current paths.
    Type: Application
    Filed: September 17, 2020
    Publication date: January 7, 2021
    Inventors: Sergey Yuferev, Robert Fehler, Petteri Palm
  • Publication number: 20200402881
    Abstract: A die package is provided. The die package may include a laminated carrier including at least one recess, a first die having a frontside, a backside, a frontside metallization on the frontside and a backside metallization on the backside, wherein the first die is arranged in the at least one recess, a first encapsulating material partially encapsulating the first die, by covering at least the frontside metallization or the backside metallization, and an adhesion promoter material between the metallization covered by the first encapsulation material and the first encapsulation material and in direct physical contact with the first encapsulation material and the metallization covered by the first encapsulation material.
    Type: Application
    Filed: June 23, 2020
    Publication date: December 24, 2020
    Inventors: Petteri Palm, Angela Kessler
  • Patent number: 10833583
    Abstract: A method of manufacturing a power semiconductor system includes providing a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board and attaching an inductor module to the power stage module such that the inductor module is electrically connected to an output node of the power stage module. The inductor module includes a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: November 10, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 10818646
    Abstract: A power device includes a frame having an electrically insulative material, an opening in the electrically insulative material, and an electrical conductor extending through the electrically insulative material. A power stage module fixed in the opening has an output terminal at a first side of the power stage module, and a power terminal, a ground terminal and a plurality of input/output (I/O) terminals at a second side of the power stage module opposite the first side. A passive component has a first terminal attached to the output terminal of the power stage module and a second terminal attached to the electrical conductor of the frame. The passive component has a larger footprint than the power stage module. The frame expands the footprint of the power stage module to accommodate mounting of the passive component to the power device. The frame has a lower interconnect density than the power stage module.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: October 27, 2020
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Eung San Cho
  • Patent number: 10811342
    Abstract: A semiconductor package includes a semiconductor die having a semiconductor device, and first and second contact pads arranged on opposite surfaces of the die. The semiconductor die is embedded in a dielectric layer. The semiconductor package also includes one or more first package contact pads and one or more second package contact pads arranged on a first major surface of the semiconductor package. The first contact pad of the die is coupled to the one or more first package contact pads, and the second contact pad of the die is coupled to the one or more second package contact pads. In operation, the semiconductor device causes a current path between the first contact pad and the second contact pad. The package contact pads are arranged on the first major surface of the semiconductor package to provide multiple non-parallel current paths.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: October 20, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Sergey Yuferev, Robert Fehler, Petteri Palm
  • Publication number: 20200321309
    Abstract: Electronic module, which comprises a first substrate, a first dielectric layer on the first substrate, at least one electronic chip, which is mounted with a first main surface directly or indirectly on partial region of the first dielectric layer, a second substrate over a second main surface of the at least one electronic chip, and an electrical contacting for the electric contact of the at least one electronic chip through the first dielectric layer, wherein the first adhesion layer on the first substrate extends over an area, which exceeds the first main surface.
    Type: Application
    Filed: June 17, 2020
    Publication date: October 8, 2020
    Applicant: Infineon Technologies AG
    Inventors: Petteri Palm, Thorsten Scharf, Ralf Wombacher
  • Patent number: 10765006
    Abstract: The present invention relates to an electronic module. In particular, to an electronic module which includes one or more components embedded in an installation base. The electronic module can be a module like a circuit board, which includes several components, which are connected to each other electrically, through conducting structures manufactured in the module. The components can be passive components, microcircuits, semiconductor components, or other similar components. Components that are typically connected to a circuit board form one group of components. Another important group of components are components that are typically packaged for connection to a circuit board. The electronic modules to which the invention relates can, of course, also include other types of components.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: September 1, 2020
    Assignee: IMBERATEK, LLC
    Inventors: Risto Tuominen, Petteri Palm
  • Publication number: 20200258873
    Abstract: A power device includes a frame having an electrically insulative material, an opening in the electrically insulative material, and an electrical conductor extending through the electrically insulative material. A power stage module fixed in the opening has an output terminal at a first side of the power stage module, and a power terminal, a ground terminal and a plurality of input/output (I/O) terminals at a second side of the power stage module opposite the first side. A passive component has a first terminal attached to the output terminal of the power stage module and a second terminal attached to the electrical conductor of the frame. The passive component has a larger footprint than the power stage module. The frame expands the footprint of the power stage module to accommodate mounting of the passive component to the power device. The frame has a lower interconnect density than the power stage module.
    Type: Application
    Filed: February 13, 2019
    Publication date: August 13, 2020
    Inventors: Petteri Palm, Eung San Cho
  • Publication number: 20200258830
    Abstract: A die package and method is disclosed. In one example, the die package includes a die having a first die contact on a first side and a second die contact on a second side opposite the first side, and insulating material laterally adjacent to the die. A metal structure substantially directly contacts the surface of the second die contact, wherein the metal structure is made of the same material as the second die contact. A first pad contact on the first side of the die electrically contacts the first die contact, and a second pad contact on the first side of the die electrically contacts the second die contact via the metal structure. The insulating material electrically insulates the metal structure from the first die contact.
    Type: Application
    Filed: February 11, 2020
    Publication date: August 13, 2020
    Applicant: Infineon Technologies AG
    Inventor: Petteri Palm
  • Patent number: 10734351
    Abstract: Electronic module, which comprises a first substrate, a first dielectric layer on the first substrate, at least one electronic chip, which is mounted with a first main surface directly or indirectly on partial region of the first dielectric layer, a second substrate over a second main surface of the at least one electronic chip, and an electrical contacting for the electric contact of the at least one electronic chip through the first dielectric layer, wherein the first adhesion layer on the first substrate extends over an area, which exceeds the first main surface.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: August 4, 2020
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Thorsten Scharf, Ralf Wombacher
  • Publication number: 20200212798
    Abstract: A method of manufacturing a power semiconductor system includes providing a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board and attaching an inductor module to the power stage module such that the inductor module is electrically connected to an output node of the power stage module. The inductor module includes a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.
    Type: Application
    Filed: March 6, 2020
    Publication date: July 2, 2020
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer
  • Patent number: 10692803
    Abstract: A power semiconductor device package includes a power semiconductor die having a first load terminal at a die frontside and a second load terminal at a die backside. The package has a package top side, a package footprint side, and a first terminal interface and a second terminal interface arranged at the package footprint side. The first terminal interface is electrically connected with the first load terminal. The die is disposed in a main cavity of an insulating core layer. A conductive material is provided at a cavity sidewall of the main cavity, and an insulation structure is provided in the main cavity. The insulation structure embeds the die, with the die backside facing the package top side. An electrical connection provided between the second load terminal and the second terminal interface is formed by at least the conductive material at the cavity sidewall.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: June 23, 2020
    Assignee: Infineon Technologies Austria AG
    Inventor: Petteri Palm
  • Publication number: 20200135619
    Abstract: In an embodiment, a semiconductor package includes a package footprint having a plurality of solderable contact pads, a semiconductor device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, a redistribution substrate having an insulating board, wherein the first power electrode and the control electrode are mounted on a first major surface of the insulating board and the solderable contact pads of the package footprint are arranged on a second major surface of the insulating board, and a contact clip having a web portion and one or more peripheral rim portions. The web portion is mounted on and electrically coupled to the second power electrode and the peripheral rim portion is mounted on the first major surface of the insulating board.
    Type: Application
    Filed: October 30, 2019
    Publication date: April 30, 2020
    Inventors: Markus Dinkel, Petteri Palm, Eung San Cho, Josef Hoeglauer, Ralf Otremba, Fabian Schnoy
  • Patent number: 10601314
    Abstract: A power semiconductor system includes a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board, and an inductor module attached to the power stage module and having an inductor electrically connected to an output node of the power stage module. The inductor is formed from a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Corresponding methods of manufacturing the power semiconductor system and the inductor module are also disclosed.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: March 24, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Petteri Palm, Frank Daeche, Zeeshan Umar, Andrew Sawle, Maciej Wojnowski, Xaver Schloegel, Josef Hoeglauer