Abstract: A capacitance detection circuit detects changes in the capacitance of a variable capacitor by using the change in capacitance to change the resonant frequency of a variable capacitor oscillator. The resonant frequency of the variable capacitor oscillator is converted from the time domain to the frequency domain, and then selected frequencies values are compared to known frequency domain values to detect the magnitude of the change in capacitance.

Abstract: An optical connector adapted to be attached to an electronics module having optical-electrical conversion electronics and a module optical window. The optical connector has a connector optical window and a port for an optical link that is optically couplable to the connector optical window. The connector optical window is constructed and arranged to optically align with the module optical window when the optical connector is attached to the electronics module.

Abstract: A capacitance detection circuit detects changes in the capacitance of a variable capacitor by using the change in capacitance to change the resonant frequency of a variable capacitor oscillator. The resonant frequency of the variable capacitor oscillator is converted from the time domain to the frequency domain, and then selected frequencies values are compared to known frequency domain values to detect the magnitude of the change in capacitance.

Abstract: Continuous time sigma delta (??) analog-to-digital conversion (ADC) circuitry and method in which current mode ?? ADC circuitry is driven directly by current mode mixing circuitry, thereby avoiding a need for a current-to-voltage driver between the input signal mixing circuitry and ?? ADC circuitry.

Abstract: Continuous time sigma delta (??) analog-to-digital conversion (ADC) circuitry and method in which current mode ?? ADC circuitry is driven directly by current mode mixing circuitry, thereby avoiding a need for a current-to-voltage driver between the input signal mixing circuitry and ?? ADC circuitry.

Abstract: A multi-channel video signal processing circuit with a bias control and respective video channel gain controls. The bias signal, which corresponds to a nominal video signal brightness level, is shared among the video channels which, in accordance with respective video gain control signals, process incoming component video signals to provide corresponding outgoing component video signals such that each one of the outgoing component video signals has a nominal outgoing video signal brightness level related to the bias signal and a corresponding one of the gain control signals.

Abstract: A socket-less test board and a clamp for clamping an integrated circuit to the socket-less test board is disclosed. The test board includes a recess region for receiving an integrated circuit to be tested. The clamp includes a base structure with a recess region to accommodate the integrated circuit and a heat sink that is positioned in contact with the package of the integrated circuit. Mounting and fastening elements mount and fasten the clamp to the test board, holding the integrated circuit in place during electrical testing.

Abstract: Video signal control circuitry for use in a video display system in which a variation in a brightness level of a video display signal causes a corresponding variation in a beam current signal, wherein such video signal control circuitry maintains a controllable video display signal brightness level at a substantially constant average value notwithstanding a variation in the incoming video signal brightness level.

Abstract: An apparatus and method for controlling signal gain and reference black level of a video signal. Magnitudes of signal gain and reference voltage for a subject video signal are determined by a common digital control signal, while the reference voltage determines the reference black level.

Abstract: A circuit for selectively controlling signal baseline and frequency emphasis. An amplifier with selectively controllable feedback circuitry allows higher frequency components of a signal to be emphasized over lower frequency components while also allowing control over the baseline of the signal. Additionally, a multiplexed video signal interface provides a multiplexed component video signal which includes component video signals with OSD data and user-controllable contrast, video gain and signal baseline, along with the ability to individually control such signal components.

Abstract: Digital circuitry for imparting halftone to that portion of a video image over which an on-screen-display (OSD) window is superimposed.

Abstract: A digitally-controlled vertical S linearity correction with a constant amplitude without using an AGC. To preserve line spacing between horizontal lines toward a top and bottom of a screen a third order correction voltage Vcube is applied to a sweep voltage Vosc. A constant current decoder determines an amount of appropriate correction current, which is employed to generate a sweep voltage with modified amplitude due to S correction and one without the modified amplitude. The sweep voltage with constant amplitude is employed to generate Vcube. Vcube is then applied to the sweep voltage along with a compensated amplitude component of the sweep voltage, such that a reduction in the amplitude caused by the S correction is compensated in the output voltage Vout. The compensation of the output voltage amplitude prevents a size reduction of the displayed picture on the screen without employing an iterative auto-align process.

Abstract: A video display interface controller for a host video display unit in which control signals multiplexed with component video signals are extracted and routed according to included address information. Control data associated with one or more local addresses is used for initial processing of the component video signals while control data associated with one or more remote addresses is used for subsequent signal processing.

Abstract: A multiplexed video signal interface in accordance with the present invention provides a multiplexed component video signal which includes component video signals with OSD data and user-controllable contrast and video gain, along with the ability to individually control such signal components. This advantageously minimizes the complexity of the necessary signal interfaces and allows for greater integration of circuit functions, thereby significantly reducing circuit complexity, size and costs. Also provided is a signal peaking circuit in the form of a variable high pass filter that enhances the magnitudes of the higher frequency signal components of the component video signals and OSD data, thereby providing for sharper edges on the displayed images.

Abstract: Digital circuitry for imparting halftone to that portion of a video image over which an on-screen-display (OSD) window is superimposed.

Abstract: An integrated circuit with a signal demultiplexor for separating out two signals of different magnitudes from within a multiplexed signal without requiring a large capacitance for signal filtering. A multiple-threshold input comparator stage separates the multiplexed input signal into a first fully demultiplexed signal and a first partially demultiplexed signal. The first fully and partially demultiplexed signals are logically processed in an Exclusive-OR gate to produce a second partially demultiplexed signal which is then time-delayed and gated by the first fully demultiplexed signal. The resultant gated signal is low pass filtered to produce a second fully demultiplexed signal.

Abstract: A cascode amplifier integrated circuit (IC) with frequency compensation capability that possesses a tight overall variation in transient rise and fall time, is relatively small in size and has a relatively high RC series circuit breakdown voltage. The cascode amplifier IC includes an input bias terminal configured to receive a bias voltage Vb, a power supply input terminal configured to receive a power supply voltage Vcc, an input signal terminal configured to receive an input voltage signal Vin, and an output signal terminal. The cascode amplifier IC also includes a gain stage circuit, an output buffer stage circuit and a resistance-capacitance (RC) series circuit configured to provide frequency compensation during operation of the cascode amplifier IC. The RC series circuit has a peaking bipolar transistor configured to provide a bipolar junction peaking capacitance between the output signal terminal and the gain stage circuit.

Abstract: A multiplexed video signal interface in accordance with the present invention provides a multiplexed component video signal in which, in addition to the component video signals with OSD data and user-controllable contrast and video gain, includes control signal components for image brightness and CRT bias along with the ability to individually control such control signal components. This advantageously minimizes the complexity of the necessary signal interfaces and allows for greater integration of circuit functions, thereby significantly reducing circuit complexity, size and costs.

Abstract: A signal peaking circuit for selectively emphasizing, or boosting, the higher frequencies of an incoming signal. A frequency emphasis circuit with an overall high pass transfer characteristic selectively emphasizes higher frequency signal components over lower frequency signal components. The transfer characteristic is selectively variable to allow the number and peak values of the emphasized signal components to be selectively variable.

Abstract: An integrated circuit with a voltage-controlled oscillator that provides an oscillation signal with an unmodulated frequency that remains constant in response to reception of a bias current having a constant magnitude and with a modulated frequency that varies in response to reception of a modulation voltage. A current-to-voltage (I:V) conversion stage converts a bias clamp current to a control voltage. A voltage-to-current (V:I) conversion stage receives the control voltage and an external modulation voltage signal and generates the control current for a current-controlled oscillator (ICO). The control voltage is based upon the threshold voltage of one of the semiconductor devices forming the I:V conversion stage and is used to drive the V:I conversion stage so long as the external modulation voltage signal is substantially zero.