Patents by Inventor Philip Christoph Brandt

Philip Christoph Brandt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848354
    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminals. The body includes: at least a diode structure configured to conduct a load current between the terminals and including an anode port electrically connected to the first load terminal and a cathode port electrically connected to the second load terminal; and drift and field stop regions of the same conductivity type. The cathode port includes first port sections and second port sections with dopants of the opposite conductivity type. A transition between each of the second port sections and the field stop region forms a respective pn-junction that extends along a first lateral direction. A lateral separation distance between immediately adjacent ones of second port sections in a second group is smaller than in a first group.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: December 19, 2023
    Assignee: Infineon Technologies AG
    Inventors: Roman Baburske, Philip Christoph Brandt, Johannes Georg Laven
  • Patent number: 11721689
    Abstract: A semiconductor device includes: a semiconductor region having charge carriers of a first conductivity type; a transistor cell in the semiconductor region; a semiconductor channel region in the transistor cell and having a first doping concentration of charge carriers of a second conductivity type, wherein a transition between the semiconductor channel region and the semiconductor region forms a first pn-junction; a semiconductor auxiliary region in the semiconductor region and having a second doping concentration of charge carriers of the second conductivity type. A transition between the semiconductor auxiliary region and semiconductor region forms a second pn-junction positioned deeper in the semiconductor region as compared to the first pn-junction.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: August 8, 2023
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Roman Baburske, Thomas Basler, Philip Christoph Brandt, Maria Cotorogea
  • Publication number: 20220367443
    Abstract: A semiconductor device includes: a semiconductor region having charge carriers of a first conductivity type; a transistor cell in the semiconductor region; a semiconductor channel region in the transistor cell and having a first doping concentration of charge carriers of a second conductivity type, wherein a transition between the semiconductor channel region and the semiconductor region forms a first pn-junction; a semiconductor auxiliary region in the semiconductor region and having a second doping concentration of charge carriers of the second conductivity type. A transition between the semiconductor auxiliary region and semiconductor region forms a second pn-junction positioned deeper in the semiconductor region as compared to the first pn-junction.
    Type: Application
    Filed: August 2, 2022
    Publication date: November 17, 2022
    Inventors: Johannes Georg Laven, Roman Baburske, Thomas Basler, Philip Christoph Brandt, Maria Cotorogea
  • Patent number: 11410989
    Abstract: A semiconductor device is operable a forward current mode and a reverse current mode and comprises a semiconductor region, and a controllable charge carrier injector, and a gate. A method includes detecting, in the reverse current mode, if the present load current in the reversed direction does not exceed a threshold value, providing a gate signal such that the gate electrode causes the charge carrier injector to induce a first charge carrier density within the semiconductor region so as to conduct a nominal load current in the reverse direction; if the present load current in the reverse direction does exceed the threshold value, operating the semiconductor device in an overload state by providing the gate signal with a voltage that causes the semiconductor region to conduct an overload current in the reverse direction, wherein the second charge carrier density is higher than the first charge carrier density.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: August 9, 2022
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Roman Baburske, Thomas Basler, Philip Christoph Brandt, Maria Cotorogea
  • Patent number: 11251266
    Abstract: A power semiconductor device includes a semiconductor body having a drift region of a first conductivity type inside an active region. An edge termination region includes: a guard region of a second conductivity type at a front side of the semiconductor body and surrounding the active region; and a field plate trench structure extending vertically into the body from the front side and at least partially filled with a conductive material that is electrically connected with the guard region and insulated from the body external of the guard region. A first portion of the field plate trench structure at least partially extends into the guard region and is at least partially arranged below a metal layer arranged at the front side. A second portion of the field plate trench structure extends outside of the guard region and surrounds the active area, the metal layer not extending above the second portion.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: February 15, 2022
    Assignee: Infineon Technologies AG
    Inventors: Philip Christoph Brandt, Manfred Pfaffenlehner, Frank Dieter Pfirsch, Francisco Javier Santos Rodriguez, Steffen Schmidt, Frank Umbach
  • Publication number: 20210376069
    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminals. The body includes: at least a diode structure configured to conduct a load current between the terminals and including an anode port electrically connected to the first load terminal and a cathode port electrically connected to the second load terminal; and drift and field stop regions of the same conductivity type. The cathode port includes first port sections and second port sections with dopants of the opposite conductivity type. A transition between each of the second port sections and the field stop region forms a respective pn-junction that extends along a first lateral direction. A lateral separation distance between immediately adjacent ones of second port sections in a second group is smaller than in a first group.
    Type: Application
    Filed: August 13, 2021
    Publication date: December 2, 2021
    Inventors: Roman Baburske, Philip Christoph Brandt, Johannes Georg Laven
  • Patent number: 11133380
    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminals. The body includes: at least a diode structure configured to conduct a load current between the terminals and including an anode port electrically connected to the first load terminal and a cathode port electrically connected to the second load terminal; and drift and field stop regions of the same conductivity type. The cathode port includes first port sections and second port sections with dopants of the opposite conductivity type. A transition between each of the second port sections and the field stop region forms a respective pn-junction that extends along a first lateral direction. A diffusion voltage of a respective one of the pn-junctions in an extension direction perpendicular to the first lateral direction is greater than a lateral voltage drop laterally overlapping with the lateral extension of the respective pn-junction.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: September 28, 2021
    Assignee: Infineon Technologies AG
    Inventors: Roman Baburske, Philip Christoph Brandt, Johannes Georg Laven
  • Patent number: 11094779
    Abstract: An edge delimits a semiconductor body in a direction parallel to a first side of the semiconductor body. A peripheral area is arranged between the active area and edge. A first semiconductor region of a first conductivity type extends from the active area into the peripheral area. A second semiconductor region of a second conductivity type forms a pn-junction with the first semiconductor region. A first edge termination region of the second conductivity type arranged at the first side adjoins the first semiconductor region, between the second semiconductor region and edge. A second edge termination region of the first conductivity type arranged at the first side and between the first edge termination region and edge has a varying concentration of dopants of the first conductivity type which increases at least next to the first edge termination region substantially linearly with an increasing distance from the first edge termination region.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: August 17, 2021
    Assignee: Infineon Technologies AG
    Inventors: Philip Christoph Brandt, Andre Rainer Stegner, Francisco Javier Santos Rodriguez, Frank Dieter Pfirsch, Hans-Joachim Schulze, Manfred Pfaffenlehner, Thomas Auer
  • Patent number: 10998399
    Abstract: A power semiconductor device includes a semiconductor substrate with an edge termination region between an active region and a lateral rim. Non-metallic electrodes extend in the edge termination region on a front side of the substrate, and include at least three spaced apart non-metallic electrodes. One non-metallic electrode is an inner non-metallic electrode having an inner edge. Another non-metallic electrode is an outer non-metallic electrode having an outer edge. The shortest distance between the inner edge of the inner non-metallic electrode and the outer edge of the most non-metallic electrode is defined as distance p. Each non-metallic electrode is electrically connected to a respective doping region of the substrate by at least two respective metallic plugs each extending through a respective first opening formed in an electrically insulating bottom layer. The shortest distance d between any two metallic plugs of different non-metallic electrodes is larger than the distance p.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: May 4, 2021
    Assignee: Infineon Technologies AG
    Inventors: Alice Pei-Shan Hsieh, Philip Christoph Brandt, Holger Huesken, Viktoryia Lapidus, Manfred Pfaffenlehner, Frank Dieter Pfirsch
  • Publication number: 20200266269
    Abstract: A power semiconductor device includes a semiconductor body having a drift region of a first conductivity type inside an active region. An edge termination region includes: a guard region of a second conductivity type at a front side of the semiconductor body and surrounding the active region; and a field plate trench structure extending vertically into the body from the front side and at least partially filled with a conductive material that is electrically connected with the guard region and insulated from the body external of the guard region. A first portion of the field plate trench structure at least partially extends into the guard region and is at least partially arranged below a metal layer arranged at the front side. A second portion of the field plate trench structure extends outside of the guard region and surrounds the active area, the metal layer not extending above the second portion.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 20, 2020
    Inventors: Philip Christoph Brandt, Manfred Pfaffenlehner, Frank Dieter Pfirsch, Francisco Javier Santos Rodriguez, Steffen Schmidt, Frank Umbach
  • Publication number: 20200243509
    Abstract: A semiconductor device is operable a forward current mode and a reverse current mode and comprises a semiconductor region, and a controllable charge carrier injector, and a gate. A method includes detecting, in the reverse current mode, if the present load current in the reversed direction does not exceed a threshold value, providing a gate signal such that the gate electrode causes the charge carrier injector to induce a first charge carrier density within the semiconductor region so as to conduct a nominal load current in the reverse direction; if the present load current in the reverse direction does exceed the threshold value, operating the semiconductor device in an overload state by providing the gate signal with a voltage that causes the semiconductor region to conduct an overload current in the reverse direction, wherein the second charge carrier density is higher than the first charge carrier density.
    Type: Application
    Filed: April 9, 2020
    Publication date: July 30, 2020
    Inventors: Johannes Georg Laven, Roman Baburske, Thomas Basler, Philip Christoph Brandt, Maria Cotorogea
  • Patent number: 10651165
    Abstract: A semiconductor device includes a semiconductor region having charge carriers of a first conductivity type, a transistor cell in the semiconductor region, and a semiconductor channel region in the transistor cell and having a first doping concentration of charge carriers of a second conductivity type. A semiconductor auxiliary region in the semiconductor region has a second doping concentration of charge carriers of the second conductivity type, which is at least 30% higher than the first doping concentration. A pn-junction between the semiconductor auxiliary region and the semiconductor region is positioned as deep or deeper in the semiconductor region as a pn-junction between the semiconductor channel region and the semiconductor region. The semiconductor auxiliary region is positioned closer to the semiconductor channel region than any other semiconductor region having charge carriers of the second conductivity type and that forms a further pn-junction with the semiconductor region.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: May 12, 2020
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Roman Baburske, Thomas Basler, Philip Christoph Brandt, Maria Cotorogea
  • Patent number: 10636900
    Abstract: A power semiconductor transistor includes an electrically conductive contact structure including a plurality of contacts. A first one of the contacts is electrically connected to both a first load terminal and a first zone of a doped semiconductor structure. A second one of the contacts is electrically coupled to one of the first load terminal and a control electrode. The second contact laterally overlaps with both a second zone of the doped semiconductor structure, and a gap is formed between two adjacent field plates. The second zone of the doped semiconductor structure terminates in a section laterally overlapping with the gap.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: April 28, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Viktoryia Uhnevionak, Philip Christoph Brandt, Frank Hille, Alexandra Ludsteck-Pechloff, Frank Dieter Pfirsch
  • Publication number: 20200013854
    Abstract: A power semiconductor device includes a semiconductor substrate with an edge termination region between an active region and a lateral rim. Non-metallic electrodes extend in the edge termination region on a front side of the substrate, and include at least three spaced apart non-metallic electrodes. One non-metallic electrode is an inner non-metallic electrode having an inner edge. Another non-metallic electrode is an outer non-metallic electrode having an outer edge. The shortest distance between the inner edge of the inner non-metallic electrode and the outer edge of the most non-metallic electrode is defined as distance p. Each non-metallic electrode is electrically connected to a respective doping region of the substrate by at least two respective metallic plugs each extending through a respective first opening formed in an electrically insulating bottom layer. The shortest distance d between any two metallic plugs of different non-metallic electrodes is larger than the distance p.
    Type: Application
    Filed: June 28, 2019
    Publication date: January 9, 2020
    Inventors: Alice Pei-Shan Hsieh, Philip Christoph Brandt, Holger Huesken, Viktoryia Lapidus, Manfred Pfaffenlehner, Frank Dieter Pfirsch
  • Patent number: 10475911
    Abstract: Some embodiments relate to a semiconductor device that includes a body region of a field effect transistor structure formed in a semiconductor substrate between a drift region of the field effect transistor structure and a source region of the field effect transistor structure. The semiconductor substrate includes chalcogen atoms at an atom concentration of less than 1×1013 cm?3 at a p-n junction between the body region and the drift region, and at least part of the source region includes chalcogen atoms at an atom concentration of greater than 1×1014 cm?3. Additional semiconductor device embodiments and corresponding methods of manufacture are described.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: November 12, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Philip Christoph Brandt, Andre Rainer Stegner
  • Publication number: 20190319092
    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminals. The body includes: at least a diode structure configured to conduct a load current between the terminals and including an anode port electrically connected to the first load terminal and a cathode port electrically connected to the second load terminal; and drift and field stop regions of the same conductivity type. The cathode port includes first port sections and second port sections with dopants of the opposite conductivity type. A transition between each of the second port sections and the field stop region forms a respective pn-junction that extends along a first lateral direction. A diffusion voltage of a respective one of the pn-junctions in an extension direction perpendicular to the first lateral direction is greater than a lateral voltage drop laterally overlapping with the lateral extension of the respective pn-junction.
    Type: Application
    Filed: June 3, 2019
    Publication date: October 17, 2019
    Inventors: Roman Baburske, Philip Christoph Brandt, Johannes Georg Laven
  • Patent number: 10340337
    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminals. The body includes: at least a diode structure configured to conduct a load current between the terminals and including an anode port electrically connected to the first load terminal and a cathode port electrically connected to the second load terminal; and drift and field stop regions of the same conductivity type. The cathode port includes first port sections and second port sections with dopants of the opposite conductivity type. A transition between each of the second port sections and the field stop region forms a respective pn-junction that extends along a first lateral direction. A diffusion voltage of a respective one of the pn-junctions in an extension direction perpendicular to the first lateral direction is greater than a lateral voltage drop laterally overlapping with the lateral extension of the respective pn-junction.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: July 2, 2019
    Assignee: Infineon Technologies AG
    Inventors: Roman Baburske, Johannes Georg Laven, Philip Christoph Brandt
  • Publication number: 20190157438
    Abstract: Some embodiments relate to a semiconductor device that includes a body region of a field effect transistor structure formed in a semiconductor substrate between a drift region of the field effect transistor structure and a source region of the field effect transistor structure. The semiconductor substrate includes chalcogen atoms at an atom concentration of less than 1×1013 cm?3 at a p-n junction between the body region and the drift region, and at least part of the source region includes chalcogen atoms at an atom concentration of greater than 1×1014 cm?3. Additional semiconductor device embodiments and corresponding methods of manufacture are described.
    Type: Application
    Filed: January 22, 2019
    Publication date: May 23, 2019
    Inventors: Hans-Joachim Schulze, Philip Christoph Brandt, Andre Rainer Stegner
  • Publication number: 20190109230
    Abstract: A power semiconductor transistor includes an electrically conductive contact structure including a plurality of contacts. A first one of the contacts is electrically connected to both a first load terminal and a first zone of a doped semiconductor structure. A second one of the contacts is electrically coupled to one of the first load terminal and a control electrode. The second contact laterally overlaps with both a second zone of the doped semiconductor structure, and a gap is formed between two adjacent field plates. The second zone of the doped semiconductor structure terminates in a section laterally overlapping with the gap.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 11, 2019
    Inventors: Viktoryia Uhnevionak, Philip Christoph Brandt, Frank Hille, Alexandra Ludsteck-Pechloff, Frank Dieter Pfirsch
  • Patent number: 10205011
    Abstract: Some embodiments relate to a method for forming a semiconductor device. The method includes forming a source region of a field effect transistor structure in a semiconductor substrate. The method further includes forming an oxide layer. The method also includes incorporating atoms of at least one atom type of a group of atom types into at least a part of the source region of the field effect transistor structure after forming the oxide layer. The group of atom types includes chalcogen atoms, silicon atoms and argon atoms.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: February 12, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Philip Christoph Brandt, Andre Rainer Stegner