Patents by Inventor Philipp Lindorfer

Philipp Lindorfer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10042009
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: August 7, 2018
    Assignee: National Semiconductor Corporation
    Inventors: Philipp Lindorfer, Peter J Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa
  • Publication number: 20160054398
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.
    Type: Application
    Filed: October 27, 2015
    Publication date: February 25, 2016
    Inventors: Philipp LINDORFER, Peter J HOPPER, William FRENCH, Paul MAWSON, Steven HUNT, Roozbeh PARSA
  • Patent number: 9201124
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: December 1, 2015
    Assignee: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Philipp Lindorfer, Peter J. Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa
  • Patent number: 8836327
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching a vapor cell structure that has a vapor cell cavity to a base die that has a laser light source that outputs light to the vapor cell cavity, and attaching a photo detection die that has a photodiode to the vapor cell structure to detect light from the laser light source that passes through the vapor cell cavity.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: September 16, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: William French, Philipp Lindorfer, Peter J. Hopper, Roozbeh Parsa, Andrew James West, Byron Jon Roderick Shulver
  • Patent number: 8554529
    Abstract: A method of simulating an integrated circuit device under test (DUT) is provided, wherein the DUT includes a plurality of terminals. For each terminal of the DUT, a probe pulse is applied to the terminal and a reaction is recorded at the terminal and each of the other terminals to obtain values representative of reactive tails for the terminal. For each terminal, the values representative of the reactive tails obtained for the terminal are stored as an entry of a look-up table. Each entry includes n+x fields, wherein n represents a number of arguments in the entry and x represents a number of functions in the entry. For each terminal, a signal value at a selected time step is calculated.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: October 8, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Yuri Mirgorodski, Peter J. Hopper, William French, Philipp Lindorfer
  • Publication number: 20130147472
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching a vapor cell structure that has a vapor cell cavity to a base die that has a laser light source that outputs light to the vapor cell cavity, and attaching a photo detection die that has a photodiode to the vapor cell structure to detect light from the laser light source that passes through the vapor cell cavity.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 13, 2013
    Inventors: William French, Philipp Lindorfer, Peter J. Hopper, Roozbeh Parsa, Andrew James West, Byron Jon Roderick Shulver
  • Publication number: 20130015850
    Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 17, 2013
    Inventors: Philipp Lindorfer, Peter J. Hopper, William French, Paul Mawson, Steven Hunt, Roozbeh Parsa
  • Patent number: 8344394
    Abstract: A circuit includes multiple doped regions in a substrate. A first of the doped regions has a tip proximate to a second of the doped regions and is separated from the second doped region by an intrinsic region to form a P-I-N structure. The circuit also includes first and second electrodes electrically coupled to the first and second doped regions, respectively. The electrodes are configured to supply voltages to the first and second doped regions to reverse bias the P-I-N structure and generate light. The first doped region could include multiple tips, the second doped region could include multiple tips, and each tip of the first doped region could be proximate to one of the tips of the second doped region to form multiple P-I-N structures. The P-I-N structure could also be configured to operate in double avalanche injection conductivity mode with internal positive feedback.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: January 1, 2013
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Vashchenko, Peter J. Hopper, Philipp Lindorfer
  • Publication number: 20120326260
    Abstract: A photodiode comprises a first terminal formed in a surface of a semiconductor substrate; a second terminal formed in the substrate surface and spaced apart from the first terminal; and a plurality of adjacent alternating N-type and P-type diffusion regions formed in the substrate surface between the first terminal and the second terminal.
    Type: Application
    Filed: June 21, 2011
    Publication date: December 27, 2012
    Inventors: William French, Peter J. Hopper, Philipp Lindorfer, Vladislav Vashchenko
  • Patent number: 8324603
    Abstract: Methods and structures provide galvanic isolation for electrical systems using a wide oxide filled trench, and that allows power across the system divide with a transformer, and that transmits data at a high baud rate using an optical link. The system solution allows the integration of all of these elements onto a single semiconductor substrate in contrast to currently available galvanic isolation systems that require multiple individual silicon die that are connected by wire bonds and are relatively slow.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: December 4, 2012
    Assignee: National Semiconductor Corporation
    Inventors: William French, Peter J. Hopper, Vladislav Vashchenko, Philipp Lindorfer
  • Patent number: 8303484
    Abstract: A self-propelled robotic device moves through bodily and other passageways by inflating regions of an overlying bladder along the length of the robotic device in a sequence that imparts motion to the device. The regions of the overlying bladder are inflated by energizing a plurality of coils, which are surrounded by a ferrofluid, in a sequence. The ferrofluid responds to the magnetic field created by an energized coil by creating a bulge in the side wall of the overlying bladder.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: November 6, 2012
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Philipp Lindorfer, William French, Visvamohan Yegnashankaran
  • Publication number: 20110174999
    Abstract: Methods and structures provide galvanic isolation for electrical systems using a wide oxide filled trench, and that allows power across the system divide with a transformer, and that transmits data at a high baud rate using an optical link. The system solution allows the integration of all of these elements onto a single semiconductor substrate in contrast to currently available galvanic isolation systems that require multiple individual silicon die that are connected by wire bonds and are relatively slow.
    Type: Application
    Filed: August 24, 2010
    Publication date: July 21, 2011
    Inventors: William French, Peter J. Hopper, Vladislav Vashchenko, Philipp Lindorfer
  • Publication number: 20110118607
    Abstract: A self-propelled robotic device moves through bodily and other passageways by inflating regions of an overlying bladder along the length of the robotic device in a sequence that imparts motion to the device. The regions of the overlying bladder are inflated by energizing a plurality of coils, which are surrounded by a ferrofluid, in a sequence. The ferrofluid responds to the magnetic field created by an energized coil by creating a bulge in the side wall of the overlying bladder.
    Type: Application
    Filed: November 19, 2009
    Publication date: May 19, 2011
    Inventors: Peter J. Hopper, Philipp Lindorfer, William French, Visvamohan Yegnashankaran
  • Patent number: 7875955
    Abstract: An on-chip inductor structure for a DC-DC power regulator circuit merges the switching transistor metallization with the inductor. Thick top level conductor metal that is used to strap the transistor array and to lower its on-state resistance is also used to extend the power inductor into the transistor array. Thus, the structure includes three basic components: a power inductor that spirals around the transistor array, the transistor array itself, and the transistor array metallization that is used to form a distributed inductance situated over the transistor array.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: January 25, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Peter Johnson, Kyuwoon Hwang, Philipp Lindorfer
  • Patent number: 7754505
    Abstract: A silicon-based light emitting structure is formed as a high density array of light-emitting p-n junctions that substantially increases the intensity of the light emitted in a planar region. The p-n junctions are formed using standard CMOS processing methods, and emit light in response to applied voltages that generate avalanche breakdown and an avalanche current.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 13, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Philipp Lindorfer, William French, Vladislav Vashchenko
  • Patent number: 7676922
    Abstract: A micro-electromechanical system (MEMS) inductor is formed in a saucer shape that completely surrounds a magnetic core structure which is formed from a ferromagnetic material. In addition, an array of MEMS inductors can be formed by dividing up the saucer-shaped MEMS inductor into a number of electrically-isolated MEMS inductor wedges.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: March 16, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Peter Johnson, Kyuwoon Hwang, Philipp Lindorfer
  • Patent number: 7595243
    Abstract: A semiconductor technology combines a normally off n-channel channel-junction insulated-gate field-effect transistor (“IGFET”) (104) and an n-channel surface-channel IGFET (100 or 160) to reduce low-frequency 1/f noise. The channel-junction IGFET is normally fabricated to be of materially greater gate dielectric thickness than the surface-channel IGFET so as to operate across a greater voltage range than the surface-channel IGFET. A p-channel surface-channel IGFET (102 or 162), which is typically fabricated to be of approximately the same gate-dielectric thickness as the n-channel surface-channel IGFET, is preferably combined with the two n-channel IGFETs to produce a complementary-IGFET structure. A further p-channel IGFET (106, 180, 184, or 192), which is typically fabricated to be of approximately the same gate dielectric thickness as the n-channel channel-junction IGFET, is also preferably included. The further p-channel IGFET can be a surface-channel or channel-junction device.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: September 29, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Constantin Bulucea, Philipp Lindorfer
  • Publication number: 20090144035
    Abstract: A modified “black box” integrated circuit simulation model is provided that is based only upon on the external steady-state and transient characteristics of a device under test (DUT). The method utilizes probe pulses as well as steady-state I-V and C-V look-up tables. In contrast to conventional black box simulation models, which support only steady-state and small signal frequency analysis, the disclosed method also supports large signal transient analysis.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 4, 2009
    Inventors: Yuri Mirgorodski, Peter J. Hopper, William French, Philipp Lindorfer
  • Patent number: 7479435
    Abstract: A MOS transistor and subsurface collectors can be formed by using a hard mask and precisely varying the implant angle, rotation, dose, and energy. In this case, a particular atomic species can be placed volumetrically in a required location under the hard mask. The dopant can be implanted to form sub-silicon volumes of arbitrary shapes, such as pipes, volumes, hemispheres, and interconnects.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: January 20, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Vladislav Vashchenko, Philipp Lindorfer, Andy Strachan
  • Patent number: 7462874
    Abstract: A silicon-based light emitting structure is formed as a high density array of light-emitting p-n junctions that substantially increases the intensity of the light emitted in a planar region. The p-n junctions are formed using standard CMOS processing methods, and emit light in response to applied voltages that generate avalanche breakdown and an avalanche current.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: December 9, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Peter J. Hopper, Philipp Lindorfer, William French, Vladislav Vashchenko