Patents by Inventor Pierangelo Confalonieri

Pierangelo Confalonieri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10118819
    Abstract: A system for driving a MEMS array having a number of MEMS structures, each defining at least one row terminal and one column terminal, envisages: a number of row driving stages, each for supplying row-biasing signals to the row terminal of each MEMS structure associated to a respective row; a number of column driving stages, each for supplying column-biasing signals to the column terminal of each MEMS structure associated to a respective column; and a control unit, for supplying row-address signals to the row driving stages for generation of the row-biasing signals and for supplying column-address signals to the column driving stages for generation of the column-biasing signals. The control unit further supplies row-deactivation and/or column-deactivation signals to one or more of the row and column driving stages, for causing deactivation of one or more rows and/or columns of the MEMS array.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: November 6, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Cattani, Alessandro Gasparini, Federico Guanziroli, Pierangelo Confalonieri
  • Publication number: 20170129773
    Abstract: A system for driving a MEMS array having a number of MEMS structures, each defining at least one row terminal and one column terminal, envisages: a number of row driving stages, each for supplying row-biasing signals to the row terminal of each MEMS structure associated to a respective row; a number of column driving stages, each for supplying column-biasing signals to the column terminal of each MEMS structure associated to a respective column; and a control unit, for supplying row-address signals to the row driving stages for generation of the row-biasing signals and for supplying column-address signals to the column driving stages for generation of the column-biasing signals. The control unit further supplies row-deactivation and/or column-deactivation signals to one or more of the row and column driving stages, for causing deactivation of one or more rows and/or columns of the MEMS array.
    Type: Application
    Filed: January 19, 2017
    Publication date: May 11, 2017
    Inventors: Alberto CATTANI, Alessandro GASPARINI, Federico GUANZIROLI, Pierangelo CONFALONIERI
  • Patent number: 9604842
    Abstract: A system for driving a MEMS array having a number of MEMS structures, each defining at least one row terminal and one column terminal, envisages: a number of row driving stages, each for supplying row-biasing signals to the row terminal of each MEMS structure associated to a respective row; a number of column driving stages, each for supplying column-biasing signals to the column terminal of each MEMS structure associated to a respective column; and a control unit, for supplying row-address signals to the row driving stages for generation of the row-biasing signals and for supplying column-address signals to the column driving stages for generation of the column-biasing signals. The control unit further supplies row-deactivation and/or column-deactivation signals to one or more of the row and column driving stages, for causing deactivation of one or more rows and/or columns of the MEMS array.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: March 28, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Cattani, Alessandro Gasparini, Federico Guanziroli, Pierangelo Confalonieri
  • Patent number: 9553546
    Abstract: A differential output stage of an amplification device, for driving a load, comprises a first and a second differential output stage portion. The first differential output stage portion comprises: a first and a second output circuit; a first driving circuit comprising a first biasing circuit; a second driving circuit comprising a second biasing circuit. The first differential output stage portion comprises: a third output circuit connected between a first node of said first biasing circuit and a first differential output terminal, having a third driving terminal connected to a first driving terminal; a fourth output circuit connected between a first node of the second biasing circuit and the first differential output terminal, having a fourth driving terminal connected to a second driving terminal.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: January 24, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventors: Pierangelo Confalonieri, Federico Guanziroli, Germano Nicollini
  • Patent number: 9287874
    Abstract: A voltage level shifting device for driving a capacitive load has an input terminal for receiving a first input signal switchable between a first logic state corresponding to a first reference voltage and a second logic state corresponding to a second reference voltage, and an output terminal for supplying an output signal switchable between a first logic state corresponding to a third reference voltage and a second logic state corresponding to a fourth reference voltage. The device also has a first electronic circuit that is activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the output terminal to the fourth reference voltage. The device further has a second electronic circuit that is activated following a commutation of the first input signal from the second reference voltage to the first reference voltage.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: March 15, 2016
    Assignee: ST-ERICSSON SA
    Inventors: Pierangelo Confalonieri, Federico Guanziroli
  • Patent number: 9264060
    Abstract: A new approach is disclosed concerning offset cancellation methods in analog to digital converters and analog to digital converters implementing the same. Such approach allows to efficiently cancel offset drifts in analog to digital converters.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: February 16, 2016
    Assignee: ST-ERICSSON SA
    Inventors: Pierangelo Confalonieri, Federico Guanziroli, Alberto Minuti
  • Publication number: 20150372680
    Abstract: A voltage level shifting device for driving a capacitive load has an input terminal for receiving a first input signal switchable between a first logic state corresponding to a first reference voltage and a second logic state corresponding to a second reference voltage, and an output terminal for supplying an output signal switchable between a first logic state corresponding to a third reference voltage and a second logic state corresponding to a fourth reference voltage. The device also has a first electronic circuit that is activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the output terminal to the fourth reference voltage. The device further has a second electronic circuit that is activated following a commutation of the first input signal from the second reference voltage to the first reference voltage.
    Type: Application
    Filed: December 5, 2013
    Publication date: December 24, 2015
    Inventors: Pierangelo CONFALONIERI, Federico GUANZIROLI
  • Publication number: 20150344295
    Abstract: A system for driving a MEMS array having a number of MEMS structures, each defining at least one row terminal and one column terminal, envisages: a number of row driving stages, each for supplying row-biasing signals to the row terminal of each MEMS structure associated to a respective row; a number of column driving stages, each for supplying column-biasing signals to the column terminal of each MEMS structure associated to a respective column; and a control unit, for supplying row-address signals to the row driving stages for generation of the row-biasing signals and for supplying column-address signals to the column driving stages for generation of the column-biasing signals. The control unit further supplies row-deactivation and/or column-deactivation signals to one or more of the row and column driving stages, for causing deactivation of one or more rows and/or columns of the MEMS array.
    Type: Application
    Filed: March 31, 2015
    Publication date: December 3, 2015
    Inventors: Alberto CATTANI, Alessandro GASPARINI, Federico GUANZIROLI, Pierangelo CONFALONIERI
  • Publication number: 20150349716
    Abstract: Differential output stage (200) of an amplification device, for driving a load, comprises a first (201) and a second (202) differential output stage portion. The first differential output stage portion (201) comprises: a first (M1PSW) and a second (M1NSW) output circuit; a first driving circuit (210) comprising a first biasing circuit (M2P, M3N, M4N, R11, I11); a second driving circuit (220) comprising a second biasing circuit (I41, R41, M4P, M3P, M2N).
    Type: Application
    Filed: January 21, 2014
    Publication date: December 3, 2015
    Applicant: ST- Ericsson SA
    Inventors: Pierangelo CONFALONIERI, Federico GUANZIROLI, Germano NICOLLINI
  • Publication number: 20150263755
    Abstract: A new approach is disclosed concerning offset cancellation methods in analog to digital converters and analog to digital converters implementing the same. Such approach allows to efficiently cancel offset drifts in analog to digital converters.
    Type: Application
    Filed: November 7, 2013
    Publication date: September 17, 2015
    Applicant: ST-ERICSSON SA
    Inventors: Pierangelo Confalonieri, Federico Guanziroli, Alberto Minuti
  • Patent number: 8692612
    Abstract: The present disclosure relates to an electronic regulation device of a variable capacitance of an integrated circuit having a time parameter depending on the variable capacitance. The regulation device includes a regulation loop, and is configured to generate in output a plurality of binary regulation signals.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierangelo Confalonieri, Federico Guanziroli, Germano Nicollini
  • Patent number: 8427196
    Abstract: A system includes analog supply circuitry providing first and second analog potentials. A switch module assumes first or second states to enable and inhibit transfer of an analog electrical signal from a source module to a user module based upon a driving electrical signal. A driving device drives, based upon the driving electrical signal, a control terminal of the switch module, allowing the switch module to assume the first or second state. The driving device allows the switch module to make a first driving transition from the first state to the second state, and a second driving transition from the second state to the first state. The driving device alternately connects the control terminal to a first reference potential, during the first state, and to a second reference potential, during the second state.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: April 23, 2013
    Assignee: STMicroelectronics S.R.L.
    Inventors: Pierangelo Confalonieri, Federico Guanziroli, Marco Zamprogno
  • Patent number: 8174807
    Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: May 8, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierangelo Confalonieri, Riccardo Martignone, Sergio Pernici
  • Publication number: 20110279936
    Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
    Type: Application
    Filed: August 1, 2011
    Publication date: November 17, 2011
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Pierangelo Confalonieri, Riccardo Martignone, Sergio Pernici
  • Patent number: 8014112
    Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: September 6, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierangelo Confalonieri, Riccardo Martignone, Sergio Pernici
  • Patent number: 7986181
    Abstract: A calibration circuit for calibrating an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance, the calibration circuit generating a calibration signal for calibrating the capacitance and including a calibration loop, suitable to carry out a calibration cycle in several sequential steps.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: July 26, 2011
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierangelo Confalonieri, Riccardo Martignone, Germano Nicollini
  • Publication number: 20110095610
    Abstract: A system includes analog supply circuitry providing first and second analog potentials. A switch module assumes first or second states to enable and inhibit transfer of an analog electrical signal from a source module to a user module based upon a driving electrical signal. A driving device drives, based upon the driving electrical signal, a control terminal of the switch module, allowing the switch module to assume the first or second state. The driving device allows the switch module to make a first driving transition from the first state to the second state, and a second driving transition from the second state to the first state. The driving device alternately connects the control terminal to a first reference potential, during the first state, and to a second reference potential, during the second state.
    Type: Application
    Filed: September 29, 2010
    Publication date: April 28, 2011
    Applicant: STMicroelectronics S.r.I.
    Inventors: Pierangelo CONFALONIERI, Federico GUANZIROLI, Marco ZAMPROGNO
  • Publication number: 20110074221
    Abstract: The present disclosure relates to an electronic regulation device of a variable capacitance of an integrated circuit having a time parameter depending on the variable capacitance. The regulation device includes a regulation loop, and is configured to generate in output a plurality of binary regulation signals.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 31, 2011
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Pierangelo Confalonieri, Federico Guanziroli, Germano Nicollini
  • Patent number: 7888994
    Abstract: An electrical circuit for conversion from differential to single-ended includes a differential amplifier stage and first and second buffer circuits. The differential amplifier stage includes a first and a second input; and a first and a different second charging circuit that can be operatively coupled, respectively, with an output of the conversion circuit and with an auxiliary output. Each of the first and second buffer circuits is functionally arranged between one of said outputs and between one of said charging circuits. The buffer circuits being configured so as to substantially equalize relative impedances seen towards said outputs.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: February 15, 2011
    Assignee: ST-Ericsson SA
    Inventors: Marco Zamprogno, Pierangelo Confalonieri, Alberto Minuti
  • Patent number: 7742893
    Abstract: A calibration circuit calibrates an adjustable capacitance of a circuit having a time constant depending on the adjustable capacitance. The calibration circuit outputs a calibration signal carrying information for calibrating the capacitor and includes a calibration loop.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: June 22, 2010
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierangelo Confalonieri, Riccardo Martignone, Marco Zamprogno