Patents by Inventor Piero Belforte
Piero Belforte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050177328Abstract: Process for the electromagnetic modelling of electronic components and systems, for the extraction of certain electrical parameters, such as the static V-I characteristics and the input and output impedance, the output switching times in particular conditions of load and the transition times of the protection diodes. A test machine of the commercial type is used for these measurements, by generating stimulus signals and measuring the correlated signals, the test machine being suitable for parametric direct current measurements, functional tests and digital integrated circuit timing and also being used as a time domain reflectometer. The measurement phase is followed by a simulation phase during which the electric parameters used for modelling electronic components and systems are extracted.Type: ApplicationFiled: May 31, 2001Publication date: August 11, 2005Inventors: Piero Belforte, Giovanni Ghigo, Flavio Maggioni
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Patent number: 6320390Abstract: A probe for fault-actuation devices has a transistor which is utilized to insert a reference signal into a fault-insertion point. The emitter and collector are connectable to the fault-insertion point and a reference signal and a capacitor with a capacitance greater than the capacitance of parasitic components is connected between the base and the emitter.Type: GrantFiled: August 7, 1998Date of Patent: November 20, 2001Assignee: Cselt-Centro Studi e Laboratori Telecomunicazioni S.p.A.Inventors: Piero Belforte, Flavio Maggioni
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Patent number: 6194909Abstract: An electronic telecommunications module has circuit components and conductors forming a telecommunications circuit having insertion points at which signals can be applied for test purposes and monitoring points from which responses can be tapped. The insertion and monitoring probes are mounted on the module and are connected to the respective points by shielded microcoaxial cables and the probes are connected by shield and microcoaxial cables on the connectors to allow interfacing between the particular module and the testing and diagnostic system.Type: GrantFiled: August 5, 1998Date of Patent: February 27, 2001Assignee: Cselt- Centro Studi E Laboratori Telecomunicazioni S.p.A.Inventors: Piero Belforte, Flavio Maggioni
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Patent number: 4593211Abstract: Two driving transistors controlled in push-pull by an input stage responsive to incoming binary signals are connected in a common-collector mode across a direct-current source in series with a high-current generator, with interposition of two switching transistors between this generator and the emitters of the driving transistors. The line wires are tied to these emitters and also to two low-current generators each shunting the combination of the high-current generator with the respective switching transistor. The input stage comprises two control transistors operated in push-pull--directly or via respective pilot transistors--by the incoming signal; the collectors of these control transistors are tied to the bases of the driving transistors while their emitters are joined in parallel to another low-current generator connected in series therewith across the source.Type: GrantFiled: November 17, 1983Date of Patent: June 3, 1986Assignee: Cselt - Centro Studi e Laboratori Telecommunicazioni S.p.A.Inventor: Piero Belforte
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Patent number: 4550398Abstract: An automatic exchange of a telephone system comprises a PCM switching network with a plurality of cascaded stages for establishing temporal and spatial connections between incoming channels on input lines of the first stage and outgoing channels on output lines of the last stage in response to commands from external controllers dialoguing with internal controllers of the network. Pairs of switching matrices forming part of nonadjacent stages are combined into modular switching units each provided with its own internal controller. Routing instructions are transmitted from an external controller to a first internal controller which selects a signal path through the matrices of its own switching unit and informs a second internal controller of that selection whereupon the latter extends the path through an adjoining switching unit, and so on until the connection is completed.Type: GrantFiled: June 22, 1983Date of Patent: October 29, 1985Assignee: Cselt - Centro Studi e Laboratori Telecomunicazioni S.p.A.Inventors: Piero Belforte, Enzo Garetti, Luciano Pilati
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Patent number: 4545051Abstract: A switching unit for the selective transfer of bytes concurrently arriving in successive time slots over eight incoming signal paths to as many outgoing signal paths with intervening temporal and/or spatial transposition comprises a byte memory, loaded by way of a series/parallel converter and read out by way of a parallel/series converter, under the control of a routing memory dialoguing via a logic network with a microprocessor. The latter, through instructions sent to the logic network, may command the blocking of the readout from the byte memory onto an outgoing path during a given time slot, the insertion of a particular byte into such a time slot, or the transfer of selected bytes from either memory to the microprocessor itself. In particular, bytes from the first time slots of PCM frames arriving over selected signal paths can be so extracted from diagnostic purposes.Type: GrantFiled: March 24, 1983Date of Patent: October 1, 1985Assignee: Cselt Centro Studi E LaboratoriInventors: Piero Belforte, Bruno Bostica, Luciano Pilati, Amilcare Bovo, Luigi Canato
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Patent number: 4543653Abstract: An automatic exchange of a telephone system comprises a PCM switching network with a plurality of cascaded stages for establishing temporal and spatial connections between incoming channels on input lines of the first stage and outgoing channels on output lines of the last stage in response to commands from external controllers dialoguing with internal controllers of the network. Pairs of switching matrices forming part of nonadjacent stages are combined ito modular switching units each provided with its own internal controller. Routing instructions are transmitted from an external controller to a first internal controller which selects a signal path through the matrices of its own switching unit and informs a second internal controller of that selection whereupon the latter extends the path through an adjoining switching unit, and so on until the connection is completed.Type: GrantFiled: June 22, 1983Date of Patent: September 24, 1985Assignee: CSELT-Centro Studi E Laboratori Telecommunicazioni S.p.A.Inventors: Piero Belforte, Mario Bondonno, Bruno Bostica, Luciano Pilati
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Patent number: 4473900Abstract: A five-stage PCM switching network of an automatic telephone exchange is divided into a set of outer modular units each including a first-stage and a fifth-stage matrix, a set of inner modular units each including a second-stage and a fourth-stage matrix, and a set of central modular units each including a pair of third-stage matrices. Each modular unit is provided with an individual base-level microprocessor controlling the switching of its matrices and the checking of their performance with the aid of ancillary equipment including transceivers sending back outgoing signals and samplers delivering bytes from corresponding time slots at opposite ends of an established signal path to a comparator in the associated microprocessor.Type: GrantFiled: January 13, 1982Date of Patent: September 25, 1984Assignee: CSELT Centro Studi Laboratori Telecommunicazioni S.p.A.Inventors: Piero Belforte, Mario Bondonno, Enzo Garetti, Giancarlo Guaschino, Luciano Pilati
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Patent number: 4404630Abstract: Incoming and outgoing lines on opposite sides of a PCM coupling network, each carrying a recurrent frame with a multiplicity of 8-bit channels which are to be individually tested, have branches extending to an input-side data extractor and an output-side data extractor of substantially identical construction co-operating with a control device such as a microprocessor serving to compare the data extracted in a given time slot from an incoming line with those extracted in a corresponding time slot from an outgoing line coupled thereto. Each extractor, realized in integrated circuitry, comprises a multiplexer for selecting one of the associated lines, a register storing the identity of the line to be selected, and presettable counters stepped by a time base synchronized with the PCM system for enabling the loading of an output register by the multiplexer at the instant when a byte of the desired channel appears on the chosen line.Type: GrantFiled: February 19, 1981Date of Patent: September 13, 1983Assignee: CSELT-Centro Studi e Laboratori Telecommunicazioni S.p.A.Inventors: Piero Belforte, Renzo Bortignon
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Patent number: 4393494Abstract: A transceiver inserted between a signal source and a two-wire or one-wire line, designed to transmit balanced or unbalanced digital signals to a remote station at the opposite end of the line while receiving similar signals from the latter station, comprises a first and a second amplifier with inputs connected to the line at a proximal and a distal end of a line-terminating impedance, respectively. Each amplifier has an inverting output connected to a noninverting output of the other amplifier, the two nodes formed between the interconnected outputs being connected to respective inputs of a differential third amplifier feeding a signal receiver. The gain of the first amplifier is half that of the second amplifier whereby the locally generated signals are suppressed in the output of the third amplifier. The several amplifiers are realized in integrated circuitry and may be provided with switches for selective changeover between a balanced and an unbalanced mode of operation.Type: GrantFiled: October 2, 1980Date of Patent: July 12, 1983Assignee: Cselt Centro Studi e Laboratori Telecomunicazioni S.p.A.Inventors: Piero Belforte, Renzo Bortignon
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Patent number: 4386425Abstract: A switching unit for the selective transfer of bytes concurrently arriving in successive time slots over eight incoming signal paths to as many outgoing signal paths with intervening temporal and/or spatial transposition comprises a byte memory loaded by way of a series/parallel converter and read out by way of a parallel/series converter; two 8.times.8 storage matrices may alternately serve as the two converters. A routing memory, connected via a logic network to a command unit such as a microprocessor, controls the transfer and may also block the readout from the byte memory under certain conditions, specifically during an initiation procedure or where the switching unit is one of several such units forming part of a larger switching or concentration structure. In response to particular instructions from the command unit, a single byte from an incoming path may be transferred to one or all of the outgoing paths.Type: GrantFiled: May 12, 1981Date of Patent: May 31, 1983Assignee: Cselt - Centro Studi e Laboratori Telecomunicazioni S.p.A.Inventors: Piero Belforte, Bruno Bostica, Luciano Pilati
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Patent number: 4162371Abstract: Two stations of a telecommunication system, interconnected by a single two-way signal link, have respective signal transmitters each working into an impedance network with a first branch connected to the two-way link and a second branch forming a voltage divider. Each station also has a signal receiver energized through a comparator which recovers the incoming signal from a composite signal present at a junction point between the two-way link and the first network branch by subtracting a balancing signal, available at the voltage divider, from this composite signal. The comparator may comprise a differential amplifier or a digital subtractor.Type: GrantFiled: January 13, 1978Date of Patent: July 24, 1979Assignee: CSELT-Centro Studi e Laboratori Telecomunicazioni S.p.A.Inventor: Piero Belforte
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Patent number: 4096396Abstract: Three identical time-base units include respective binary counting circuits which are stepped in parallel by a series of clock pulses to generate trains of timing pulses and, after a certain number of clock cycles following resetting by a zeroizing pulse, emit synchronizing pulses which are jointly fed to three decision networks respectively associated with these counting circuits. The decision networks determine by majority logic whether synchronizing signals from at least two of the three counting circuits coincide and upon such coincidence cause the resetting of the respective counting circuits to zero. A monitoring circuit, also operating by majority logic, is connected to the three decision networks to indicate a malfunction of any of the three time-base units without halting the generation of the timing pulses by the defective unit if the latter is merely out of step.Type: GrantFiled: December 8, 1976Date of Patent: June 20, 1978Assignee: CSELT - Centro Studi e Laboratori TelecomunicazioniInventors: Piero Belforte, Flavio Melindo
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Patent number: 4027106Abstract: A processor in a telephone exchange, monitoring the activity of r subscriber lines having each an incoming and an outgoing channel allocated to them, emits during respective halves of any 8-bit time slot in a 32-time-slot frame a pair of m-bit addresses x, y for each subscriber initiating or engaged in a conversation, these addresses respectively identifying an outgoing channel of a first (e.g. calling) subscriber and an incoming channel of a second (e.g. called) subscriber to be placed once per frame in communication with each other by a PCM switching network. The addresses of incoming and outgoing channels issuing from the processor during each time slot are separated in a distributor, the addresses y being inscribed in stages of a storage network respectively assigned to the 32.sup.. 32.sup.. n channels identified by addresses x. The storage network consists of n random-access memories, one for each of n channel groups, divided into 32 sections of 32 stages each for as many 32-channel families.Type: GrantFiled: January 27, 1976Date of Patent: May 31, 1977Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni SpAInventors: Piero Belforte, Giancarlo Guaschino, Giovanni Perucca
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Patent number: 4009349Abstract: A switching station for a telecommunication system, operating with pulse-code modulation, serves a multiplicity of incoming and outgoing PCM channels each consisting of a succession of 8-bit words cyclically interleaved with the words of 31 other channels in an assigned time slot of a 32-channel frame, 32 such frames being received and transmitted over as many signal paths forming a frame group. There are n incoming frame groups and n outgoing frame groups with synchronized bit phases in all the spatially separated channels thereof. A central processor controls the concurrent storage of all the incoming bits of a given phase in n pairs of 16-section input memories, each memory section consisting of 8 stages for the bits of a respective word from an incoming channel on a receiving signal path.Type: GrantFiled: September 4, 1975Date of Patent: February 22, 1977Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni SpAInventors: Piero Belforte, Giovanni Perucca