Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a first light-emitting diode (LED) layer including a first LED of a first color type, the first LED layer having a first side and a second side opposite to the first side; a second LED layer over the first LED layer, the second LED layer including a second LED of a second color type, and the second LED layer having a first side and a second side opposite to the first side; and a third LED layer over the second LED layer, the third LED layer including a third LED of a third color type, and the third LED layer having a first side and a second side opposite to the first side; wherein the first color type, the second color type, and the third color type are different from each other.

Abstract: A method for forming a pellicle apparatus involves forming a device substrate by depositing one or more pellicle layers defined over a base device layer, where a release layer is formed thereover. An adhesive layer is formed over a transparent carrier substrate. The adhesive layer is bonded to the release layer, defining a composite substrate comprised of the device and carrier substrates. The base device layer is removed from the composite structure and a pellicle frame is attached to an outermost one of the pellicle layers. A pellicle region is isolated from a remainder of the composite structure, and an ablation of the release layer is performed through the transparent carrier substrate, defining the pellicle apparatus comprising a pellicle film attached to the pellicle frame. The pellicle apparatus is then from a remaining portion of the composite substrate.

Abstract: A device includes two BSI image sensor elements and a third element. The third element is bonded in between the two BSI image sensor elements using element level stacking methods. Each of the BSI image sensor elements includes a substrate and a metal stack disposed over a first side of the substrate. The substrate of the BSI image sensor element includes a photodiode region for accumulating an image charge in response to radiation incident upon a second side of the substrate. The third element also includes a substrate and a metal stack disposed over a first side of the substrate. The metal stacks of the two BSI image sensor elements and the third element are electrically coupled.

Abstract: An apparatus and method is provided for controlling a propagation of a bond wave during semiconductor processing. The apparatus has a first chuck to selectively retain a first workpiece. A second chuck selectively retains a second workpiece. The first and second chucks selectively secure at least a periphery of the respective first workpiece and second workpiece. An air vacuum is circumferentially located in a region between the first chuck and second chuck. The air vacuum is configured to induce a vacuum between the first workpiece and second workpiece to selectively bring the first workpiece and second workpiece together from a propagation point. The air vacuum can be localized air vacuum guns, a vacuum disk, or an air curtain positioned about the periphery of the region between the first chuck and second chuck. The air curtain induces a lower pressure within the region between the first and second chucks.

Abstract: A method of making a semiconductor package includes bonding a carrier to a surface of the substrate, wherein the carrier is free of active devices, wherein the carrier includes a carrier bond pad on a surface of the carrier. The method further includes bonding a wafer bond pad of an active circuit wafer to the carrier bond pad, wherein the bonding of the wafer bond pad to the carrier bond pad comprises re-graining the wafer bond pad to form at least one grain boundary extending from the wafer bond pad to the carrier bond pad.

Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.

Abstract: Various embodiments of the present application are directed towards a method for workpiece-level alignment with low alignment error and high throughput. In some embodiments, the method comprises aligning a first alignment mark on a first workpiece to a field of view (FOV) of an imaging device based on feedback from the imaging device, and further aligning a second alignment mark on a second workpiece to the first alignment mark based on feedback from the imaging device. The second workpiece is outside the FOV during the aligning of the first alignment mark. The aligning of the second alignment mark is performed without moving the first alignment mark out of the FOV. Further, the imaging device views the second alignment mark, and further views the first alignment mark through the second workpiece, during the aligning of the second alignment mark. The imaging device may, for example, perform imaging with reflected infrared radiation.

Abstract: Methods for forming an integrated device using CMOS processing with wafer bonding. In an embodiment, a method is disclosed that includes defining an integrated circuit function using a front-end substrate having one or more active devices and a back-end substrate having connections formed in metal layers in dielectric material, wherein the back-end substrate is free from active devices; manufacturing the front-end substrate in a first semiconductor process; more or less simultaneously, manufacturing the back-end substrate in a second semiconductor process; physically contacting bonding surfaces of the front-end substrate and the back-end substrate; and performing wafer bonding to form bonds between the front-end and back-end substrates to form an integrated circuit. Additional methods are disclosed.

Abstract: A method for forming a pellicle apparatus involves forming a device substrate by depositing one or more pellicle layers defined over a base device layer, where a release layer is formed thereover. An adhesive layer is formed over a transparent carrier substrate. The adhesive layer is bonded to the release layer, defining a composite substrate comprised of the device and carrier substrates. The base device layer is removed from the composite structure and a pellicle frame is attached to an outermost one of the pellicle layers. A pellicle region is isolated from a remainder of the composite structure, and an ablation of the release layer is performed through the transparent carrier substrate, defining the pellicle apparatus comprising a pellicle film attached to the pellicle frame. The pellicle apparatus is then from a remaining portion of the composite substrate.

Abstract: An apparatus and method is provided for controlling a propagation of a bond wave during semiconductor processing. The apparatus has a first chuck to selectively retain a first workpiece. A second chuck selectively retains a second workpiece. The first and second chucks selectively secure at least a periphery of the respective first workpiece and second workpiece. An air vacuum is circumferentially located in a region between the first chuck and second chuck. The air vacuum is configured to induce a vacuum between the first workpiece and second workpiece to selectively bring the first workpiece and second workpiece together from a propagation point. The air vacuum can be localized air vacuum guns, a vacuum disk, or an air curtain positioned about the periphery of the region between the first chuck and second chuck. The air curtain induces a lower pressure within the region between the first and second chucks.

Abstract: A device includes two BSI image sensor elements and a third element. The third element is bonded in between the two BSI image sensor elements using element level stacking methods. Each of the BSI image sensor elements includes a substrate and a metal stack disposed over a first side of the substrate. The substrate of the BSI image sensor element includes a photodiode region for accumulating an image charge in response to radiation incident upon a second side of the substrate. The third element also includes a substrate and a metal stack disposed over a first side of the substrate. The metal stacks of the two BSI image sensor elements and the third element are electrically coupled.

Abstract: A method of manufacturing a semiconductor structure includes receiving a first substrate including a first dielectric layer disposed over the first substrate and a first conductive structure surrounded by the first dielectric layer; receiving a second substrate including a second dielectric layer disposed over the second substrate and a second conductive structure surrounded by the second dielectric layer; bonding the first dielectric layer with the second dielectric layer; and bonding the first conductive structure with the second conductive structure.

Abstract: A method of making a micro electromechanical system (MEMS) package includes patterning a substrate to form a MEMS section. The method further includes bonding a carrier to a surface of the substrate. The carrier is free of active devices. The carrier includes a carrier bond pad on a surface of the carrier opposite the MEMS section. The carrier bond pad is electrically connected to the MEMS section. The method further includes bonding a wafer bond pad of an active circuit wafer to the carrier bond pad. The bonding of the wafer bond pad to the carrier bond pad includes re-graining the wafer bond pad to form at least one grain boundary extending from the wafer bond pad to the carrier bond pad.

Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

Abstract: Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together.

Abstract: An embodiment method includes forming a first plurality of bond pads on a device substrate, depositing a spacer layer over and extending along sidewalls of the first plurality of bond pads, and etching the spacer layer to remove lateral portions of the spacer layer and form spacers on sidewalls of the first plurality of bond pads. The method further includes bonding a cap substrate including a second plurality of bond pads to the device substrate by bonding the first plurality of bond pads to the second plurality of bond pads.

Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a first light-emitting diode (LED) layer including a first LED of a first color type, the first LED layer having a first side and a second side opposite to the first side; a second LED layer over the first LED layer, the second LED layer including a second LED of a second color type, and the second LED layer having a first side and a second side opposite to the first side; and a third LED layer over the second LED layer, the third LED layer including a third LED of a third color type, and the third LED layer having a first side and a second side opposite to the first side; wherein the first color type, the second color type, and the third color type are different from each other.

Abstract: A method of fabricating a semiconductor device includes providing a first substrate comprising a first conductive element exposed at a surface of the first substrate; forming a patterned photoresist layer atop the first conductive element, whereby the patterned photoresist layer provides openings exposing the first conductive element; forming a first metal layer in the openings and directly atop the first conductive element; forming a first insulator layer over the first metal layer and the first substrate; and polishing the first metal layer and the first insulator layer, resulting in a first interface surface over the first substrate wherein the first interface surface includes part of the first metal layer and the first insulator layer.

Abstract: A semiconductor structure includes a first substrate including a cavity extended into the first substrate, a device disposed within the cavity, a first dielectric layer disposed over the first substrate and a first conductive structure surrounded by the first dielectric layer, and a second substrate including a second dielectric layer disposed over the second substrate and a second conductive structure surrounded by the second dielectric layer, wherein the first conductive structure is bonded with the second conductive structure and the first dielectric layer is bonded with the second dielectric layer to seal the cavity.