Patents by Inventor Po-Chun Lin

Po-Chun Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220255769
    Abstract: An array controlling system includes a database, a controlling center and an array device. The controlling center reads a plurality of data of the database. The array device includes a processing unit, a main bus and an array unit. The processing unit receives a command of the controlling center and converts the command into a communication data. The main bus is configured to transmit the communication data to the array unit. A plurality of array modules of the array unit are connected in series with each other through a serial bus, and sequentially receive the communication data. The processing unit controls each of the array modules according to the communication data. A plurality of sensing data of the array modules are collected to the processing unit. The processing unit returns the sensing data to the database or the controlling center to update the database.
    Type: Application
    Filed: May 26, 2021
    Publication date: August 11, 2022
    Inventors: Hsuan-Yu HUANG, Shun-Han KO, Yu-Hung LIN, Po-Chun CHIU, Hsien-Tang JAO
  • Publication number: 20220254888
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
    Type: Application
    Filed: March 15, 2021
    Publication date: August 11, 2022
    Inventors: Yi-Chieh Wang, Po-Chun Lai, Ke-Feng Lin, Chen-An Kuo, Ze-Wei Jhou
  • Patent number: 11410939
    Abstract: Structures and formation methods of a chip package are provided. The chip package includes a substrate and a semiconductor die over the substrate. The chip package also includes a lid covering a top surface of the semiconductor die. The lid has a first support structure and a second support structure, and the first support structure and the second support structure are positioned at respective corner portions of the substrate. An opening penetrates through the lid to expose a space containing the semiconductor die, and the lid has a side edge extending from an edge of the first support structure to an edge of the second support structure.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Shen Yeh, Chin-Hua Wang, Kuang-Chun Lee, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng
  • Patent number: 11387105
    Abstract: First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: July 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Po-Chun Liu, Stan Chen
  • Publication number: 20220216629
    Abstract: The present invention discloses an electrical connector and an electrical connector assembly. The electrical connector includes a circuit board, a connection port, and an insulating member. The circuit board has a conductive region, located on a surface of the circuit board. The connection port is arranged on the surface of the circuit board, and the connection port is electrically connected to the circuit board. The insulating member is arranged on the circuit board, and surrounds an outer periphery of the connection port. The insulating member includes a metal layer, arranged on an outer surface of the insulating member.
    Type: Application
    Filed: October 22, 2021
    Publication date: July 7, 2022
    Inventors: Ho-Ching HUANG, Chien-Hao HSU, Chyi-Nan CHEN, Chuan-Yuan LIN, Po-Chun CHEN
  • Patent number: 11374136
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: June 28, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11159457
    Abstract: Orchestrated chat services utilizing a centralized chat service with access to a plurality of chatbots registered to the chat service. User's seeking support from the orchestrated chat service interact with a single user interface, while the backend of the chat service extracts the intents and entities from the user's input into the chat service. The orchestrated chat service identifies one or more classifications of chatbots suitable for responding to the user's input within a prescribed level of confidence dictated by one or more orchestration rules and selects a chatbot predicted to most likely respond to the user's input in a correct and accurate manner. The orchestrated chat service formats the user input and chat history into format of the selected chatbot's API, forwards user input and history to the selected chatbot and returns the response from the selected chatbot to the user interface of the orchestrated chat service.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: October 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lin Chung Liang, Chao Yuan Huang, Jen Ping Cheng, Po-Chun Lin, Yen Lin Li
  • Patent number: 11151597
    Abstract: The present disclosure provides a method, computer system and computer program product for determining interruption points based on emotion values in a content. According to the method, emotion values of one or more emotion catalogs at one or more time points of the content to be interrupted can be determined, and one or more interruption points can be determined based on the determined emotion values.
    Type: Grant
    Filed: January 5, 2020
    Date of Patent: October 19, 2021
    Assignee: International Business Machines Corporation
    Inventors: Jen Ping Cheng, Chao Yuan Huang, Yen Lin Li, Lin Chung Liang, Po Chun Lin
  • Publication number: 20210280511
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Application
    Filed: May 10, 2021
    Publication date: September 9, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20210144107
    Abstract: Orchestrated chat services utilizing a centralized chat service with access to a plurality of chatbots registered to the chat service. User's seeking support from the orchestrated chat service interact with a single user interface, while the backend of the chat service extracts the intents and entities from the user's input into the chat service. The orchestrated chat service identifies one or more classifications of chatbots suitable for responding to the user's input within a prescribed level of confidence dictated by one or more orchestration rules and selects a chatbot predicted to most likely respond to the user's input in a correct and accurate manner. The orchestrated chat service formats the user input and chat history into format of the selected chatbot's API, forwards user input and history to the selected chatbot and returns the response from the selected chatbot to the user interface of the orchestrated chat service.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 13, 2021
    Inventors: Lin Chung Liang, Chao Yuan Huang, Jen Ping Cheng, Po-Chun Lin, Yen Lin Li
  • Patent number: 11004786
    Abstract: A package structure includes a die, a TIV, a first encapsulant, a RDL structure, a thermal dissipation structure and a second encapsulant. The die has a first surface and a second surface opposite to each other. The TIV is laterally aside the die. The first encapsulant encapsulates sidewalls of the die and sidewalls of the TIV. The RDL structure is disposed on the first surface of the die and on the first encapsulant, electrically connected to the die and the TIV. The thermal dissipation structure is disposed over the second surface of die and electrically connected to the die through the TIV and the RDL structure. The second encapsulant encapsulates sidewalls of the thermal dissipation structure.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20210098636
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: January 20, 2020
    Publication date: April 1, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 10923455
    Abstract: The present disclosure is directed to a method for preparing a semiconductor apparatus having a plurality of bonded semiconductor devices formed by a fusion bonding technique and a method for preparing the same. The method includes the steps of forming a first semiconductor device having a first conductive portion, a first dielectric portion adjacent to the first conductive portion, and a depression at an upper surface of the first conductive portion; forming a second semiconductor device having a second conductive portion and a second dielectric portion adjacent to the second conductive portion; disposing the first semiconductor device and the second semiconductor device in a manner such that the first conductive portion faces the second conductive portion; and expanding at least one of the first conductive portion and the second conductive portion to fill the depression.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: February 16, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Po-Chun Lin, Chin-Lung Chu
  • Patent number: 10825794
    Abstract: The present disclosure is directed to method for preparing a semiconductor apparatus having a plurality of bonded semiconductor devices formed by a fusion bonding technique. The method includes operations of forming a first semiconductor device having a first conductive portion, a first dielectric portion adjacent to the first conductive portion, and a depression at an upper surface of the first conductive portion; forming a second semiconductor device having a second conductive portion and a second dielectric portion adjacent to the second conductive portion; disposing the first semiconductor device and the second semiconductor device in a manner such that the first conductive portion faces the second conductive portion; and expanding at least one of the first conductive portion and the second conductive portion to fill the depression.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: November 3, 2020
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Po-Chun Lin, Chin-Lung Chu
  • Patent number: 10811545
    Abstract: A sensing module including a sensing array, a first shielding layer, a second shielding layer, and a reflective layer is provided. The sensing array includes a plurality of light passing regions and a light receiving surface facing away from an object, and the sensing array is located between the first shielding layer having a plurality of first openings and the second shielding layer having a plurality of second openings. The second shielding layer is located between the sensing array and the reflective layer. The light beams reflected by the object sequentially pass through the first openings, the light passing regions, the second openings, and are then transmitted to the reflective layer. The light beams are reflected by the reflective layer and then pass through the second openings again to be transmitted to the light receiving surface of the sensing array. An image capturing apparatus is also provided.
    Type: Grant
    Filed: July 14, 2019
    Date of Patent: October 20, 2020
    Assignee: Gingy Technology Inc.
    Inventors: Chiung-Han Wang, Wen-Chen Lee, Po-Chun Lin, Jen-Chieh Wu
  • Publication number: 20200294912
    Abstract: A package structure includes a die, a TIV, a first encapsulant, a RDL structure, a thermal dissipation structure and a second encapsulant. The die has a first surface and a second surface opposite to each other. The TIV is laterally aside the die. The first encapsulant encapsulates sidewalls of the die and sidewalls of the TIV. The RDL structure is disposed on the first surface of the die and on the first encapsulant, electrically connected to the die and the TIV. The thermal dissipation structure is disposed over the second surface of die and electrically connected to the die through the TIV and the RDL structure. The second encapsulant encapsulates sidewalls of the thermal dissipation structure.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20200266227
    Abstract: A sensing module including a sensing array, a first shielding layer, a second shielding layer, and a reflective layer is provided. The sensing array includes a plurality of light passing regions and a light receiving surface facing away from an object, and the sensing array is located between the first shielding layer having a plurality of first openings and the second shielding layer having a plurality of second openings. The second shielding layer is located between the sensing array and the reflective layer. The light beams reflected by the object sequentially pass through the first openings, the light passing regions, the second openings, and are then transmitted to the reflective layer. The light beams are reflected by the reflective layer and then pass through the second openings again to be transmitted to the light receiving surface of the sensing array. An image capturing apparatus is also provided.
    Type: Application
    Filed: July 14, 2019
    Publication date: August 20, 2020
    Applicant: Gingy Technology Inc.
    Inventors: Chiung-Han Wang, Wen-Chen Lee, Po-Chun Lin, Jen-Chieh Wu
  • Publication number: 20200143412
    Abstract: The present disclosure provides a method, computer system and computer program product for determining interruption points based on emotion values in a content. According to the method, emotion values of one or more emotion catalogs at one or more time points of the content to be interrupted can be determined, and one or more interruption points can be determined based on the determined emotion values.
    Type: Application
    Filed: January 5, 2020
    Publication date: May 7, 2020
    Inventors: Jen Ping Cheng, Chao Yuan Huang, Yen Lin Li, Lin Chung Liang, Po Chun Lin
  • Patent number: 10607858
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor substrate and a first conductive bump. The semiconductor substrate has an integrated circuit and an interconnection metal layer, and a tilt surface is formed on an edge of the semiconductor substrate. The first conductive bump is electrically connected to the integrated circuit via the interconnection metal layer, and is disposed on the tilt surface, wherein a profile of the first conductive bump extends beyond a side surface of the edge of the semiconductor layer.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: March 31, 2020
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Po-Chun Lin, Chin-Lung Chu
  • Patent number: 10580665
    Abstract: A package structure includes an interconnection layer; a passivation layer disposed on the interconnection layer, in which the interconnection layer and the passivation layer defined at least one opening; at least one elastic bump disposed on the interconnection layer, in which a portion of the elastic bump is embedded in the opening; and a conductive layer disposed on the elastic bump.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: March 3, 2020
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Po-Chun Lin