Patents by Inventor PO-HAO TSENG

PO-HAO TSENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240274164
    Abstract: A memory device and an in-memory search method thereof are provided. The in-memory search method includes: providing, in a first stage, a first voltage or a second voltage to a word line of at least one target memory cell according to a logical status of searched data, and reading a first current; providing, in a second stage, a third voltage or a fourth voltage to the word line of the at least one target memory cell according to the logical status of the searched data, and reading a second current; and obtaining a search result according to a difference between the second current and the first current.
    Type: Application
    Filed: February 9, 2023
    Publication date: August 15, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Po-Hao Tseng, Feng-Min Lee, Tian-Cih Bo
  • Publication number: 20240274165
    Abstract: A memory device for performing in-memory-search. A search voltage corresponding to a search data is applied to the first signal lines. A plurality of second signal lines of the memory device generate output currents. The threshold voltage of each of the memory cells of the memory device corresponds to a stored data, the stored data is compared with the search data to obtain a comparison result. The output current reflects the comparison result. Values of the stored data and search data of the first memory cells are equal to values of the stored data and the search data of the second memory cells. The threshold voltage of the first memory cells is complementary to the threshold voltage of the second memory cells. The search voltage applied to the first memory cells is complementary to the search voltage applied to the second memory cells.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 15, 2024
    Inventors: Po-Hao TSENG, Tian-Cih BO, Feng-Min LEE
  • Publication number: 20240274199
    Abstract: A hyperdimensional computing device includes a non-volatile memory cell array and a first operation circuit. The non-volatile memory cell array is coupled to a plurality of first word lines. The non-volatile memory cell array has a plurality of memory cell groups, a plurality of first memory cells of each of the memory cell groups are coupled to a same first word line of the first word lines, and the memory cell groups respectively store a plurality of data vectors. The first operation circuit receives at least one of the data vectors through bit lines and generates a bundled data vector according to the at least one of the data vectors.
    Type: Application
    Filed: February 9, 2023
    Publication date: August 15, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Yu-Hsuan Lin, Po-Hao Tseng
  • Publication number: 20240265966
    Abstract: An in-dynamic memory search device and an operation method thereof are provided. The in-dynamic memory search device includes at least one word line, at least two bit lines, at least one match line, at least one unit cell, at least two search lines, at least one pre-charge unit and at least one sense unit. The unit cell includes two storage elements and two search transistors. Each of the storage elements includes a write transistor and a read transistor. The write transistor is connected to the word line and one of the bit lines. The read transistor is connected to the write transistor and the match line. The search transistors are respectively connected to the read transistors. The search lines are respectively connected to the search transistors. The pre-charge unit is connected to the match line. The sense unit is connected to the match line.
    Type: Application
    Filed: February 6, 2023
    Publication date: August 8, 2024
    Inventors: Po-Hao TSENG, Feng-Min LEE, Yu-Hsuan LIN
  • Patent number: 12057179
    Abstract: A memory device, which includes a first driving circuit, a second driving circuit, a sensing circuit and an in-memory search (IMS) array. Memory units of the in-memory search array are arranged as a plurality of horizontal rows and vertical columns. Control terminal of each the memory unit in the same vertical column is coupled to the first driving circuit through a word line. The memory units of the same vertical column are connected in series and coupled to the second driving circuit through a bit line, and coupled to the sensing circuit through a source line. Every 2N adjacent memory units in the same vertical column are arranged as a memory unit to store an encoded data of 2N bits corresponding to an original data of M bits, where N and M are positive integers, and N is greater than or equal to two.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: August 6, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Po-Hao Tseng
  • Publication number: 20240257873
    Abstract: A hybrid in-memory search (IMS) content addressable memory (CAM) cell includes: a first IMS CAM cell; and a second IMS CAM cell, coupled to the first IMS CAM cell. The first IMS CAM cell and the second IMS CAM cell are of different types. When the hybrid IMS CAM cell stores a storage data, the first IMS CAM cell stores a first part of the storage data and the second IMS CAM cell stores the storage data or a second part of the storage data.
    Type: Application
    Filed: February 1, 2023
    Publication date: August 1, 2024
    Inventors: Po-Hao TSENG, Yu-Hsuan LIN, Tian-Cih BO, Feng-Min LEE, Yu-Yu LIN
  • Publication number: 20240242757
    Abstract: A universal memory for In-Memory Computing and an operation method thereof are provided. The universal memory includes at least one write word line, at least one unit cell and at least one read word line. The unit cell includes a write transistor and a read transistor. The gate of the write transistor is connected to the write word line. The write transistor is a transistor with adjustable threshold voltage. The gate of the read transistor is connected to the drain or the source of the write transistor. The read word line is connected to the drain or the source of the read transistor. The universal memory is used for a training mode and an inference mode. In the training mode and the inference mode, a weight is stored at different locations of the unit cell.
    Type: Application
    Filed: April 7, 2023
    Publication date: July 18, 2024
    Inventors: Feng-Min LEE, Po-Hao TSENG, Yu-Yu LIN, Ming-Hsiu LEE
  • Publication number: 20240221822
    Abstract: A memory cell and a memory device are provided. The memory cell comprises: a write transistor; and a read transistor coupled to the write transistor, the write transistor and the read transistor coupled at a storage node, the storage node being for storing data; wherein, at least one among the write transistor and the read transistor includes a threshold voltage adjusting layer, and a threshold voltage of the write transistor and/or the read transistor is adjustable.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 4, 2024
    Inventors: Po-Hao TSENG, Feng-Min LEE
  • Publication number: 20240221830
    Abstract: A memory device and an in-memory search method thereof are provided. The memory device includes a first memory cell block, a second memory cell block, at least one search memory cell pair, and a sense amplifier. The search memory cell pair includes a first search memory cell and a second search memory cell. The first search memory cell and the second search memory cell are respectively disposed in the first memory cell block and the second memory cell block. The first search memory cell and the second search memory cell respectively receive a first search voltage and a second search voltage. The first search voltage and the second search voltage are generated according to searched data. The sense amplifier generates a search result according to signals on a first bit line and a second bit line.
    Type: Application
    Filed: February 23, 2023
    Publication date: July 4, 2024
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Po-Hao Tseng, Tian-Cih Bo, Feng-Min Lee
  • Patent number: 12020747
    Abstract: A non-volatile memory and a programming method thereof are provided. The programming method of the non-volatile memory includes the following steps. A coarse programming procedure is performed for programing all of a plurality of memory cells at an erase state to 2{circumflex over (?)}N?1 or 2{circumflex over (?)}N program states. N is a positive integer. A fine programming procedure is performed for pushing all of memory cells into 2{circumflex over (?)}N?1 or 2{circumflex over (?)}N verify levels.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: June 25, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Po-Hao Tseng, Feng-Min Lee, Yung-Chun Li
  • Publication number: 20240194229
    Abstract: The disclosure provides an in-memory search (IMS) memory cell, an IMS method and an IMS memory device. The IMS method comprises: encoding a search data and a storage data by a first IMS encoding into a first IMS encoded search data and a first IMS encoded storage data; encoding the first IMS encoded search data by a second IMS encoding into a plurality of search voltages; encoding the first IMS encoded storage data by the second IMS encoding into a plurality of threshold voltages of a plurality of memory cells of a plurality IMS memory cells of the IMS memory device; and searching the IMS memory cells by the search voltages to generate a search result.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 13, 2024
    Inventors: Yun-Yuan WANG, Cheng-Hsien LU, Po-Hao TSENG, Ming-Hsiu LEE
  • Publication number: 20240161826
    Abstract: A TCAM comprises a plurality of first search lines, a plurality of second search lines, a plurality of memory cell strings and one or more current sensing units. The memory cell strings comprise a plurality of memory cells. The current sensing units are coupled to the memory cell strings. In a search operation, a determination that whether any of the data stored in the memory cell strings matches a data string to be searched is made according to whether the one or more current sensing units detect current from the memory cell strings, or according to the magnitude of the current flowing out from the memory cell strings detected by the one or more current sensing units. Each memory cell includes a first transistor, a second transistor and an inverter. The first search line is coupled to the second search line by the inverter.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Inventors: Po-Hao TSENG, Feng-Min LEE, Ming-Hsiu LEE
  • Patent number: 11967378
    Abstract: The application discloses an analog content addressable memory (CAM) device, an analog CAM cell and a method for data searching and comparing thereof. The CAM cell includes: a first memory cell and a second memory cell coupled to each other, wherein the analog CAM cell stores analog storage data which is corresponding to a match range, the match range is determined based on first and second threshold voltages of the analog CAM cell; an analog search data is converted into first and second analog search voltages; the first and the second memory cells receive the first and the second analog search voltages; and the analog CAM memory cell generates a memory cell current, or the analog CAM memory cell keeps or discharges a match line voltage on a match line coupled to the analog CAM memory cell.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: April 23, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Po-Hao Tseng
  • Patent number: 11955202
    Abstract: A multilevel content addressable memory, a multilevel coding method and a multilevel searching method are provided. The multilevel coding method includes the following steps. A highest decimal value of a multilevel-bit binary data is obtained. A length of a digital string data is set as being the highest decimal value of the multilevel-bit binary data. The multilevel-bit binary data is converted into the digital string data. If a content of the multilevel-bit binary data is an exact value, a number of an indicating bit in the digital string data is the exact value.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: April 9, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Hsiu Lee, Po-Hao Tseng
  • Patent number: 11955186
    Abstract: A memory device for in-memory search is provided. The memory device includes a plurality of memory cells, and each of the memory cells stores a stored data and receives a search data, including a first transistor and a second transistor. The first transistor has a first threshold voltage and receives a first gate bias. The second transistor is connected to the first transistor, and the second transistor has a second threshold voltage and receives a second gate bias. The stored data is encoded according to the first threshold voltage and the second threshold voltage, and the search data is encoded according to the first gate bias and the second gate bias. There is a mismatch distance between the stored data and the search data. An output current generated by each of the memory cells is related to the mismatch distance.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: April 9, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Po-Hao Tseng, Tian-Cih Bo
  • Publication number: 20240090238
    Abstract: A memory device and a method for manufacturing the memory device are provided. The memory device includes a stack and a plurality of memory strings. The stack is disposed on the substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings pass through the stack along a first direction, wherein a first memory string in the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are separated from each other. The channel layer is disposed between the first conductive pillar and the second conductive pillar. The memory structure surrounds the second conductive pillar, and the memory structure includes a resistive memory material.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Feng-Min LEE, Erh-Kun LAI, Dai-Ying LEE, Yu-Hsuan LIN, Po-Hao TSENG, Ming-Hsiu LEE
  • Patent number: 11923008
    Abstract: A TCAM comprises a plurality of first search lines, a plurality of second search lines, a plurality of memory cell strings and one or more current sensing units. The memory cell strings comprise a plurality of memory cells. The current sensing units are coupled to the memory cell strings. In a search operation, a determination that whether any of the data stored in the memory cell strings matches a data string to be searched is made according to whether the one or more current sensing units detect current from the memory cell strings, or according to the magnitude of the current flowing out from the memory cell strings detected by the one or more current sensing units. Each memory cell includes a first transistor and a second transistor. Gates of the first and second transistors are coupled to a corresponding first search line and a corresponding second search line.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: March 5, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Po-Hao Tseng, Feng-Min Lee, Ming-Hsiu Lee
  • Publication number: 20240021254
    Abstract: A memory device for in-memory search is provided. The memory device includes a plurality of memory cells, and each of the memory cells stores a stored data and receives a search data, including a first transistor and a second transistor. The first transistor has a first threshold voltage and receives a first gate bias. The second transistor is connected to the first transistor, and the second transistor has a second threshold voltage and receives a second gate bias. The stored data is encoded according to the first threshold voltage and the second threshold voltage, and the search data is encoded according to the first gate bias and the second gate bias. There is a mismatch distance between the stored data and the search data. An output current generated by each of the memory cells is related to the mismatch distance.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: Po-Hao TSENG, Tian-Cih BO
  • Patent number: 11875849
    Abstract: An analog content-address memory (analog CAM) having approximation matching and an operation method thereof are provided. The analog CAM includes an inputting circuit, at least one analog CAM cell and an outputting circuit. The inputting circuit is configured to provide an inputting data. The analog CAM cell is connected to the inputting circuit and receives the inputting data. The analog CAM cell has a mild swing match curve whose highest point corresponds to a stored data. A segment from the highest point of the mild swing match curve to a lowest point of the mild swing match curve corresponds to at least three data values. The outputting circuit is connected to the analog CAM cell and receives a match signal from the analog CAM cell. The outputting circuit outputs a match approximation level according to the match signal.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: January 16, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Hsuan Lin, Po-Hao Tseng, Feng-Min Lee
  • Patent number: 11875850
    Abstract: The application provides a content addressable memory (CAM) memory device, a CAM memory cell and a method for searching and comparing data thereof. The CAM memory device includes: a plurality of CAM memory strings; and an electrical characteristic detection circuit. In data searching, a search data is compared with a storage data stored in the CAM memory strings, the CAM memory strings generate a plurality of memory string currents, the electrical characteristic detection circuit detects the memory string currents to generate a plurality of sensing results, or detects a plurality of match line voltages on a plurality of match lines coupled to the CAM memory string to generate the plurality of search results. The storage data and the search data is a range storage data and a single-bit search data, or the storage data and the search data is a single-bit storage data and a range search data.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: January 16, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Po-Hao Tseng