Abstract: A memory structure including a substrate, charge storage layers, and a gate is provided. The charge storage layers are located on the substrate. The gate is located on the substrate on one side of the charge storage layers. The gate extends along a first direction. The gate has a protruding portion protruding along a second direction. The second direction intersects the first direction. The protruding portion is located between two adjacent charge storage layers arranged along the first direction.

Abstract: A QPM waveguide includes an optical substrate having periodic domain-inverted regions and non-inverted regions which are arranged alternately, and a waveguide part passing through the domain-inverted regions and non-inverted regions. The substrate is divided into at least two sections each of which has a wave input facet and a wave output facet. At least one band-pass filter layer is disposed on the wave input facet of one section to filter out a signal wave for preventing back conversion so that the energy of the conversion wave can increase. A method for preventing the back conversion is also disclosed.

Abstract: A QPM waveguide includes an optical substrate having periodic domain-inverted regions and non-inverted regions which are arranged alternately, and a waveguide part passing through the domain-inverted regions and non-inverted regions. The substrate is divided into at least two sections each of which has a wave input facet and a wave output facet. At least one band-pass filter layer is disposed on the wave input facet of one section to filter out a signal wave for preventing back conversion so that the energy of the conversion wave can increase. A method for preventing the back conversion is also disclosed.

Abstract: A method of fabricating a device is described. A substrate having at least two isolation structures is provided. A first oxide layer and a first conductive layer are sequentially formed on the substrate between the isolation structures. A first nitridation process is performed to form a first nitride layer on the surface of the first conductive layer and a first oxynitride layer on the surface of the isolation structures. A second oxide layer is formed on the first nitride layer and first oxynitride layer. A densification process is performed to oxidize the first oxynitride layer on the surface of the isolation structures. A second nitride layer and a third oxide layer are sequentially formed on the second oxide layer. A second nitridation process is performed to form a third nitride layer on the surface of the third oxide layer. A second conductive layer is formed on the third nitride layer.