Patents by Inventor Po-Yang Chen
Po-Yang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12253756Abstract: An electronic device including a first light emitting unit, a second light emitting unit, a first optical layer and a second optical layer is disclosed. The first light emitting unit emits a first light. The second light emitting unit emits a second light. At least one of the first light and the second light passes through the first optical layer. The second optical layer is overlapped with the first optical layer. The second optical layer is configured to scatter the first light emitted from the first light emitting unit. When the first light emitting unit emits the first light, the second light emitting unit selectively emits the second light.Type: GrantFiled: January 31, 2024Date of Patent: March 18, 2025Assignee: InnoLux CorporationInventors: Kuei-Sheng Chang, Kuo-Jung Wu, Po-Yang Chen, I-An Yao
-
Patent number: 12235594Abstract: A method for performing a lithography process is provided. The method includes forming a photoresist layer over a substrate, providing a plurality of target droplets to a source vessel, and providing a plurality of first laser pulses according to a control signal provided by a controller to irradiate the target droplets in the source vessel to generate plasma as an EUV radiation. The plasma is generated when the control signal indicates a temperature of the source vessel is within a temperature threshold value. The method further includes directing the EUV radiation from the source vessel to the photoresist layer to form a patterned photoresist layer and developing and etching the patterned photoresist layer to form a circuit layout.Type: GrantFiled: May 31, 2023Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chi Yang, Ssu-Yu Chen, Shang-Chieh Chien, Chieh Hsieh, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
-
Publication number: 20250060938Abstract: Systems and methods for efficient convolution based on matrix multiply and add (MMA) are described. An example processor having a plurality of processing lanes is configured to perform convolution of a matrix of activation elements and a filter matrix in accordance with a configurable series of instructions including a plurality of MMA instructions and shift instructions while reusing activation elements already loaded to the datapath or associated memory over a plurality of MMA operations. Associated methods are also described.Type: ApplicationFiled: August 14, 2023Publication date: February 20, 2025Inventors: Jack CHOQUETTE, Po-An TSAI, Alexander L. MINKIN, Manan PATEL, Neal Clayton CRAGO, Daniel STIFFLER, Kefeng DUAN, Yu-Jung CHEN, Jing LI, Qian WANG, Ronny KRASHINSKY, Jun YANG, Feng XIE
-
Publication number: 20250051901Abstract: A method for the surface treatment of a corrosion-resistant nickel-based alloy and the resulting surface structure of the treated alloy is disclosed. The method includes immersing a nickel-based alloy in a first neutral or alkaline solution to remove surface contaminants, followed by immersing the cleaned alloy in a second neutral or alkaline solution to form functional groups on its surface. Subsequently, a low-temperature heat treatment is performed to form a passivation layer on the surface of the nickel-based alloy. The passivation layer has a surface roughness of less than 0.04 microns and a thickness ranging from 5 nanometers to 200 nanometers. The resulting corrosion-resistant nickel-based alloy comprises a substrate made of the nickel-based alloy and a passivation layer established on at least one surface of the substrate. The nickel content of the alloy is greater than 50%, and the alloy may also contain additional metallic components such as chromium (Cr) and manganese (Mn).Type: ApplicationFiled: April 3, 2024Publication date: February 13, 2025Inventors: Tsung Feng Wu, Chun-Chih Liao, Po-Chia Huang, Guo-Yang Ciou, Chia-Te Lin, Po-Han Chen
-
Publication number: 20250053049Abstract: An electronic device comprises a substrate, a semiconductor element disposed on the substrate and comprising a top surface, a bottom surface and a side surface connected between the top surface and the bottom surface, and a shielding element comprising a first portion, a second portion and a third portion. The first portion is disposed between the bottom surface of the semiconductor layer and the substrate, the second portion surrounds the side surface of the semiconductor element, and the semiconductor element is disposed between the first portion and the third portion.Type: ApplicationFiled: October 29, 2024Publication date: February 13, 2025Applicant: Innolux CorporationInventors: Hsiao Feng Liao, Shu-Fen Li, Chuan-Chi Chien, Po-Yang Chen, I-An Yao
-
Publication number: 20250038061Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic component and a heat dissipation structure having an opening are arranged on a carrier structure, a heat sink is arranged in the opening and bonded to the electronic component, and the electronic component, the heat dissipation structure and the heat sink are covered with an encapsulation layer, such that the heat sink can be arranged according to a heat source of a specific part of the electronic component so as to effectively dissipate heat.Type: ApplicationFiled: January 12, 2024Publication date: January 30, 2025Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chia-Yang CHEN, Chien-Ming CHANG, Po-Hsin TSAI
-
Patent number: 12205816Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.Type: GrantFiled: April 16, 2021Date of Patent: January 21, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Chuan Wang, Guan-Xuan Chen, Chia-Yang Hung, Sheng-Liang Pan, Huan-Just Lin
-
Publication number: 20250005257Abstract: A method for performing automatic layout defect checking (ALDC) control regarding circuit design, associated apparatus and an associated computer-readable medium are provided. The method applicable to a processing circuit may include: providing a web-based entry in an ALDC control system running on a processing circuit, for any user among multiple users to upload at least a layout file of a package substrate design of at least one package substrate to the ALDC control system, in order to obtain at least the layout file from a client electronic device through the web-based entry; utilizing at least one backend program module to check the layout file according to a plurality of predetermined layout defect checking rules to generate at least one checking result, and create a layout defect checking report of the package substrate design; and sending the layout defect checking report corresponding to the layout file to the client electronic device.Type: ApplicationFiled: June 10, 2024Publication date: January 2, 2025Applicant: MEDIATEK INC.Inventors: Shu-Huan Chang, Yi-Hung Chen, Chih-Jung Hsu, Chen Lien, Guan-Qi Fang, Deng-Yao Tu, Po-Yang Chen
-
Publication number: 20240404446Abstract: An electronic device includes a pixel circuit, a data line and two control signal lines. The pixel circuit includes a first sub-pixel circuit and a second sub-pixel circuit, in which a light color of the first sub-pixel circuit is different from a light color of the second sub-pixel circuit. The data line is electrically connected with the first sub-pixel circuit and the second sub-pixel circuit. The two control signal lines are respectively a first control signal line and a second control signal line. The first control signal line is electrically connected with the first sub-pixel circuit for controlling a light-emitting time of the first sub-pixel circuit, and the second control signal line is electrically connected with the second sub-pixel circuit for controlling a light-emitting time of the second sub-pixel circuit.Type: ApplicationFiled: May 5, 2024Publication date: December 5, 2024Applicant: InnoLux CorporationInventors: Chien-Chih LIAO, Hsing-Yuan Hsu, Po-Yang Chen, I-An Yao
-
Patent number: 12158675Abstract: A display device includes a backlight module and a display panel. The display panel is disposed on the backlight module and includes two substrates, a sensor, and a light-shielding element. The sensor is disposed between the two substrates. The light-shielding element at least partially surrounds the sensor. A height of the light-shielding element is greater than a height of the sensor.Type: GrantFiled: August 24, 2023Date of Patent: December 3, 2024Assignee: Innolux CorporationInventors: Hsiao Feng Liao, Shu-Fen Li, Chuan-Chi Chien, Po-Yang Chen, I-An Yao
-
Publication number: 20240379038Abstract: A display device includes a display panel, an optical structure layer, a driving unit, a timing control unit and a light sensing unit. The optical structure layer is disposed on the display panel. The driving unit is electrically connected to the display panel. The timing control unit is electrically connected to the driving unit. The light sensing unit is electrically connected to the timing control unit to provide a light sensing result to the timing control unit. The timing control unit is used to receive a first signal and provides a second signal and a third signal to the driving unit according to the light sensing result, and the driving unit drives the display panel according to the second signal and the third signal.Type: ApplicationFiled: April 11, 2024Publication date: November 14, 2024Inventors: Jen-I YANG, Kuo-Jung WU, Po-Yang CHEN, I-An YAO
-
Patent number: 12105904Abstract: An electronic device includes a signal readout line and a sensor component electrically connected to the signal readout line. The sensor component includes a pixel sensor and a sensor pad. The pixel sensor includes a first transistor, a first capacitor and a second transistor. The first transistor includes a first terminal, a second terminal, and a first control terminal. The first capacitor is electrically connected to the first control terminal and the second terminal. The second transistor includes a third terminal, a fourth terminal and a second control terminal. The fourth terminal is electrically connected to the signal readout line. The sensor pad is electrically connected to the second terminal. The pixel sensor includes a third transistor including a fifth terminal, a sixth terminal and a third control terminal. The third control terminal is electrically connected to the second terminal. The sixth terminal is electrically connected to the third terminal.Type: GrantFiled: January 19, 2022Date of Patent: October 1, 2024Assignee: INNOLUX CORPORATIONInventors: Shun-Mao Lin, Hsing-Yuan Hsu, Po-Yang Chen, I-An Yao
-
Publication number: 20240312427Abstract: An electronic device includes a panel. The panel includes a plurality of scan electrodes, a plurality of data electrodes and a cholesteric liquid crystal layer. The plurality of data electrodes and the plurality of scan electrodes are intersected with each other to define a plurality of pixels. The cholesteric liquid crystal layer is disposed between the plurality of scan electrodes and the plurality of data electrodes. In a writing mode, a first voltage difference is applied to at least one pixel disposed in a writing area, and a second voltage difference is applied to at least a portion of the other pixels disposed in a non-writing area. In an erasing mode, a third voltage difference is applied to at least one pixel disposed in an erasing area, where the first voltage difference is different from the second voltage difference, and the first voltage difference is different from the third voltage difference.Type: ApplicationFiled: February 16, 2024Publication date: September 19, 2024Inventors: Ming-Chi GUO, Hsing-Yuan HSU, Po-Yang CHEN, I-An YAO
-
Publication number: 20240304160Abstract: An electronic device with a plurality of panels is provided. The electronic device also has a plurality of scan line driving circuits that correspond to the panels in order to drive the panels. The electronic device also has a controller that is configured to control the scan line driving circuits. Each panel includes a plurality of scan lines. Prior to image refreshing, the controller controls the scan line driving circuits to reset the panels. The controller performs image refreshing by controlling each scan line driving circuit to scan the scan lines of its corresponding panel in a jumping mode scanning procedure.Type: ApplicationFiled: January 29, 2024Publication date: September 12, 2024Inventors: Shun-Mao LIN, Hsing-Yuan HSU, Po-Yang CHEN, I-An YAO
-
Publication number: 20240280812Abstract: A head mounted device and an operating method for the head mounted device are provided. The head mounted device includes a display unit, a first sensing device and a second sensing device. The display unit displays an image. The first sensing device detects whether there is an object causing harm to the user within a specific range. The second sensing device captures an object image of the object, so that the display unit displays the object image.Type: ApplicationFiled: January 11, 2024Publication date: August 22, 2024Applicant: Innolux CorporationInventors: Chien-Chih Liao, Hsing-Yuan Hsu, Po-Yang Chen, I-AN YAO
-
Publication number: 20240264690Abstract: The present disclosure provides an electronic device including a first sensing unit, a first transistor coupled to the first sensing unit, a second transistor coupled to the first transistor, a second sensing unit, a third transistor coupled to the second sensing unit, a fourth transistor coupled to the third transistor, a first signal line coupled to the second transistor and the fourth transistor, and a power line coupled to the first transistor and the third transistor, in which the power line is disposed between the first sensing unit and the second sensing unit.Type: ApplicationFiled: April 1, 2024Publication date: August 8, 2024Applicant: InnoLux CorporationInventors: Shu-Fen Li, Chuan-Chi Chien, Hsiao-Feng Liao, Rui-An Yu, Chang-Chiang Cheng, Po-Yang Chen, I-An Yao
-
Publication number: 20240242016Abstract: A layout routing method includes determining a routing pattern according to a swapping rule, a via pattern, area constraints and pin locations; optimizing swapping in differential pairs according to the routing pattern; extracting features of each routing net to obtain extracted features; using an unsupervised algorithm to generate different routing groups according to the extracted features; and determining a routing order of the routing groups according to complex features of the routing groups.Type: ApplicationFiled: December 25, 2023Publication date: July 18, 2024Applicant: MEDIATEK INC.Inventors: Chih-Jung Hsu, Chen Lien, Deng-Yao Tu, Po-Yang Chen, Guan-Qi Fang, Shu-Huan Chang, Yi-Hung Chen, Yao-Chun Su, Yu-Yang Chen
-
Publication number: 20240231517Abstract: An electronic device includes a first insulating layer, a first conductive portion, a second conductive portion, a transistor, and an electronic unit. The first insulating layer has a first opening penetrating the first insulating layer along a first direction. The first conductive portion is disposed in the first opening. The second conductive portion is electrically connected to the first conductive portion. The transistor is electrically connected to the second conductive portion. The electronic unit is electrically connected to the first conductive portion. In a cross-sectional view of the electronic device, the electronic unit and the second conductive portion are disposed on two opposite sides of the first insulating layer respectively, the first conductive portion has a first length along a second direction perpendicular to the first direction, the second conductive portion has a second length along the second direction, and the first length is different from the second length.Type: ApplicationFiled: January 4, 2024Publication date: July 11, 2024Applicant: InnoLux CorporationInventors: Po-Yang Chen, Hsing-Yuan Hsu, Tzu-Min Yan, Chun-Hsien Lin, Kuei-Sheng Chang
-
Publication number: 20240168329Abstract: An electronic device including a first light emitting unit, a second light emitting unit, a first optical layer and a second optical layer is disclosed. The first light emitting unit emits a first light. The second light emitting unit emits a second light. At least one of the first light and the second light passes through the first optical layer. The second optical layer is overlapped with the first optical layer. The second optical layer is configured to scatter the first light emitted from the first light emitting unit. When the first light emitting unit emits the first light, the second light emitting unit selectively emits the second light.Type: ApplicationFiled: January 31, 2024Publication date: May 23, 2024Applicant: InnoLux CorporationInventors: Kuei-Sheng CHANG, Kuo-Jung Wu, Po-Yang Chen, I-An Yao
-
Patent number: D1063925Type: GrantFiled: January 21, 2021Date of Patent: February 25, 2025Assignee: COMPAL ELECTRONICS, INC.Inventors: Po-Yang Chien, Hao-Jen Fang, Wei-Yi Chang, Chun-Chieh Chen, Chen-Cheng Wang, Chih-Wen Chiang, Sheng-Hung Lee