Patents by Inventor Pohsiang Hsu

Pohsiang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7469011
    Abstract: Techniques and tools for escape mode code resizing are described. For example, a video decoder receives encoded information (e.g., runs, levels) for transform coefficients of blocks. For at least some of the encoded information, the decoder decodes in an escape mode for which codes have sizes signaled on a sub-frame basis (e.g., on a per-interlaced field basis in a video frame, or on a per-slice basis in a video frame). A video encoder performs corresponding encoding and signaling.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: December 23, 2008
    Assignee: Microsoft Corporation
    Inventors: Chih-Lung Lin, Pohsiang Hsu, Thomas W. Holcomb, Sridhar Srinivasan
  • Patent number: 7426308
    Abstract: Techniques and tools for encoding and decoding video images (e.g., interlaced frames) are described. For example, a video encoder or decoder processes 4:1:1 format macroblocks comprising four 8×8 luminance blocks and four 4×8 chrominance blocks. In another aspect, fields in field-coded macroblocks are coded independently of one another (e.g., by sending encoded blocks in field order). Other aspects include DC/AC prediction techniques and motion vector prediction techniques for interlaced frames.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: September 16, 2008
    Assignee: Microsoft Corporation
    Inventors: Pohsiang Hsu, Bruce Chih-Lung Lin, Thomas W. Holcomb, Kunal Mukerjee, Sridhar Srinivasan
  • Patent number: 7412102
    Abstract: A video encoder/decoder implements a lapped transform by applying an overlap filter in the spatial or transform domains to transform blocks. For interlace frames whose alternating scan lines are temporally displaced, the encoder/decoder imposes a limitation on application of the overlap filter to exclude horizontal block edges between adjacent transform blocks. This limitation can be imposed in both implementations where the overlap transform is applied across all blocks of an image, as well as implementations in which the lapped transform is conditionally applied on a spatially varying basis across the image.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: August 12, 2008
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Pohsiang Hsu
  • Patent number: 7379607
    Abstract: Various techniques and tools for encoding and decoding (e.g., in a video encoder/decoder) binary information (e.g., skipped macroblock information) are described. In some embodiments, the binary information is arranged in a bit plane, and the bit plane is coded at the picture/frame layer. The encoder and decoder process the binary information and, in some embodiments, switch coding modes. For example, the encoder and decoder use normal, row-skip, column-skip, or differential modes, or other and/or additional modes. In some embodiments, the encoder and decoder define a skipped macroblock as a predicted macroblock whose motion is equal to its causally predicted motion and which has zero residual error. In some embodiments, the encoder and decoder use a raw coding mode to allow for low-latency applications.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: May 27, 2008
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Pohsiang Hsu
  • Patent number: 7369709
    Abstract: A digital media content (e.g., image, video, audio, etc.) encoder/decoder employs a spatially varying parameter to condition the application of an overlap pre-process and post-process to adjacent transform block edges for the spatial-domain lapped transform. This conditional application of the lapped transform to sub-blocks of the digital media can be signaled on an edge, block, macro-block or other granularity. Further, a restriction on use of the conditional lapped transform based on a frame-level quantization or other bit-rate related parameter minimizes the signaling overhead impact at low bit-rates of coding.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: May 6, 2008
    Assignee: Microsoft Corporation
    Inventors: Pohsiang Hsu, Sridhar Srinivasan
  • Patent number: 7352905
    Abstract: A decoder receives luma motion vector information for plural luma motion vectors for a macroblock (e.g., a 4:2:0 macroblock). The decoder derives a chroma motion vector for each of the plural luma motion vectors by performing at least one calculation on the luma motion vector information, maintaining a 1:1 ratio of chroma motion vectors to luma motion vectors for the macroblock. For example, the decoder receives four luma (frame or field) motion vectors for a macroblock and derives four chroma motion vectors for the macroblock. The deriving can comprise sub-sampling and/or rounding (e.g., using a field-based rounding table).
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: April 1, 2008
    Assignee: Microsoft Corporation
    Inventors: Kunal Mukerjee, Pohsiang Hsu
  • Publication number: 20070248163
    Abstract: A video encoder identifies one or more portions of a video picture that contain DC shift blocks and adjusts quantization (e.g., by selecting a smaller quantization step size) to reduce contouring artifacts when the picture is reconstructed. The encoder can identify the portion(s) of the picture that contain DC shift blocks by identifying one or more gradient slope regions in the picture and analyzing quantization effects on DC coefficients in the gradient slope region(s). The encoder can select a coarser quantization step size for a high-texture picture portion.
    Type: Application
    Filed: April 7, 2006
    Publication date: October 25, 2007
    Applicant: Microsoft Corporation
    Inventors: Xiping Zuo, Chih-Lung Lin, Pohsiang Hsu
  • Publication number: 20070237221
    Abstract: A video encoder identifies one or more AC coefficients of each of plural blocks in the picture. The encoder identifies a threshold quantization step size such that the identified AC coefficient(s) of each of the plural blocks are nonzero after quantization according to the threshold quantization step size. The threshold quantization step size is such that quantization according to the next higher quantization step size would result in at least one of the identified AC coefficient(s) of at least one of the plural blocks being zero. For example, identifying the threshold quantization step size comprises identifying n top AC coefficients in each of four blocks of a macroblock, determining the smallest AC coefficient among the identified n top AC coefficients of the four blocks, and iteratively evaluating the smallest AC coefficient with respect to candidate quantization step sizes until the threshold quantization step size is identified.
    Type: Application
    Filed: April 7, 2006
    Publication date: October 11, 2007
    Applicant: Microsoft Corporation
    Inventors: Pohsiang Hsu, Chih-Lung Lin, Xiping Zuo
  • Publication number: 20070110326
    Abstract: Various techniques and tools for encoding and decoding (e.g., in a video encoder/decoder) binary information (e.g., skipped macroblock information) are described. In some embodiments, the binary information is arranged in a bit plane, and the bit plane is coded at the picture/frame layer. The encoder and decoder process the binary information and, in some embodiments, switch coding modes. For example, the encoder and decoder use normal, row-skip, column-skip, or differential modes, or other and/or additional modes. In some embodiments, the encoder and decoder define a skipped macroblock as a predicted macroblock whose motion is equal to its causally predicted motion and which has zero residual error. In some embodiments, the encoder and decoder use a raw coding mode to allow for low-latency applications.
    Type: Application
    Filed: January 10, 2007
    Publication date: May 17, 2007
    Applicant: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Pohsiang Hsu
  • Patent number: 7200275
    Abstract: Various techniques and tools for encoding and decoding (e.g., in a video encoder/decoder) binary information (e.g., skipped macroblock information) are described. In some embodiments, the binary information is arranged in a bit plane, and the bit plane is coded at the picture/frame layer. The encoder and decoder process the binary information and, in some embodiments, switch coding modes. For example, the encoder and decoder use normal, row-skip, column-skip, or differential modes, or other and/or additional modes. In some embodiments, the encoder and decoder define a skipped macroblock as a predicted macroblock whose motion is equal to its causally predicted motion and which has zero residual error. In some embodiments, the encoder and decoder use a raw coding mode to allow for low-latency applications.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: April 3, 2007
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Pohsiang Hsu
  • Patent number: 7162093
    Abstract: A video encoder/decoder utilizes a bistream syntax that provides an independently decodable, partial picture unit, which may be in the form of a unit containing one or more contiguous rows of macroblocks (called a slice). This slice layer provides a flexible combination of error-resilience and compression efficiency. The slice layer encodes an efficient addressing mechanism (e.g., a syntax element specifying a beginning macroblock row of the slice layer), as well as an efficient mechanism to optionally retransmit picture header information. The slice layer provides decoding and reconstruction independence by disabling all forms of prediction, overlap and loop-filtering across slice-boundaries. This permits a slice coded in intra-mode to be reconstructed error-free, irrespective of errors in other regions of the picture.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: January 9, 2007
    Assignee: Microsoft Corporation
    Inventors: Shankar Regunathan, Pohsiang Hsu, Ce Wang, Chih-Lung Lin, Jie Liang, Sridhar Srinivasan
  • Publication number: 20060268990
    Abstract: A video encoder includes a region detector module that classifies blocks of video frames. An adaptive filter module applies a median filter to a block based upon a block classification assigned by the region detector module. An adaptive quantization module quantizes a block according to a quantization method adaptively determined based upon a block classification assigned by the region detection module. In one example, a video encoder adaptively determines a median filter selected using a block classification. In another example, a video encoder adaptively determines whether to drop an isolated last transform coefficient based on the block classification, and/or applies a dead-zone selected using the block classification.
    Type: Application
    Filed: May 25, 2005
    Publication date: November 30, 2006
    Applicant: Microsoft Corporation
    Inventors: Chih-Lung Lin, Minghui Xia, Pohsiang Hsu, Shou-Jen Wu
  • Publication number: 20060262979
    Abstract: Various techniques and tools for encoding and decoding (e.g., in a video encoder/decoder) binary information (e.g., skipped macroblock information) are described. In some embodiments, the binary information is arranged in a bit plane, and the bit plane is coded at the picture/frame layer. The encoder and decoder process the binary information and, in some embodiments, switch coding modes. For example, the encoder and decoder use normal, row-skip, column-skip, or differential modes, or other and/or additional modes. In some embodiments, the encoder and decoder define a skipped macroblock as a predicted macroblock whose motion is equal to its causally predicted motion and which has zero residual error. In some embodiments, the encoder and decoder use a raw coding mode to allow for low-latency applications.
    Type: Application
    Filed: July 27, 2006
    Publication date: November 23, 2006
    Applicant: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Pohsiang Hsu
  • Patent number: 7120197
    Abstract: Techniques and tools for processing reference frames in a motion estimation/compensation loop or motion compensation loop are described. For example, a video encoder or decoder filters reference frames to reduce discontinuities at block boundaries, improving the efficiency of motion estimation and compensation.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: October 10, 2006
    Assignee: Microsoft Corporation
    Inventors: Chih-Lung Lin, Pohsiang Hsu, Thomas W. Holcomb, Ming-Chieh Lee
  • Patent number: 7099515
    Abstract: In one aspect, an encoder/decoder selects a bitplane mode from a group of plural available bitplane modes, and processes a bitplane according to the selected bitplane mode, wherein the bitplane indicates AC prediction status information for plural macroblocks of a video picture. In another aspect, an encoder encodes a bitplane that indicates AC prediction status information for plural macroblocks of a video picture and signals the encoded bitplane. In another aspect, a decoder receives an encoded bitplane and decodes the bitplane, wherein the bitplane indicates AC prediction status information for plural macroblocks of a video picture.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: August 29, 2006
    Assignee: Microsoft Corporation
    Inventors: Chih-Lung Lin, Pohsiang Hsu, Sridhar Srinivasan, Thomas W. Holcomb
  • Patent number: 7092576
    Abstract: In one aspect, for a first interlaced video frame in a video sequence, a decoder decodes a bitplane signaled at frame layer for the first interlaced video frame. The bitplane represents field/frame transform types for plural macroblocks of the first interlaced video frame. For a second interlaced video frame in the video sequence, for each of at least one but not all of plural macroblocks of the second interlaced video frame, the decoder processes a per macroblock field/frame transform type bit signaled at macroblock layer. An encoder performs corresponding encoding.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: August 15, 2006
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Chih-Lung Lin, Thomas W. Holcomb, Kunal Mukerjee, Pohsiang Hsu
  • Publication number: 20060146830
    Abstract: Various new and non-obvious apparatus and methods for using frame caching to improve packet loss recovery are disclosed. One of the disclosed embodiments is a method for using periodical and synchronized frame caching within an encoder and its corresponding decoder. When the decoder discovers packet loss, it informs the encoder which then generates a frame based on one of the shared frames stored at both the encoder and the decoder. When the decoder receives this generated frame it can decode it using its locally cached frame.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 6, 2006
    Applicant: Microsoft Corporation
    Inventors: Chih-Lung Lin, Minghui Xia, Pohsiang Hsu, Shankar Regunathan, Thomas Holcomb
  • Publication number: 20060072672
    Abstract: A video codec provides for encoding and decoding pictures of a video sequence at various coded resolutions, such that pictures can be encoded at lower coded resolutions based on bit rate or other constraints while maintaining a consistent display resolution. The video codec employs a coding syntax where a maximum coded resolution is signaled at the sequence level of the syntax hierarchy, whereas a lower coded resolution is signaled at the entry point level for a segment of one or more intra-coded frames and frames predictively encoded based thereon. This allows the use of a separate out-of-loop resampler after the decoder to up-sample the pictures to the display resolution.
    Type: Application
    Filed: October 6, 2004
    Publication date: April 6, 2006
    Applicant: Microsoft Corporation
    Inventors: Thomas Holcomb, Chih-Lung Lin, Sridhar Srinivasan, Pohsiang Hsu
  • Publication number: 20060072673
    Abstract: A video codec provides for encoding and decoding pictures of a video sequence at various coded resolutions, such that pictures can be encoded at lower coded resolutions based on bit rate or other constraints while maintaining a consistent display resolution. The video codec further provide for encoding and decoding pictures of the video sequence at ranges lower than that used for display, and then expanding the range after decoding for display. The video codec applies post-processing operations, such as de-blocking, de-ringing, and color conversion, at the native resolution and range of the decoded video, prior to range expansion and upsampling for display.
    Type: Application
    Filed: April 29, 2005
    Publication date: April 6, 2006
    Applicant: Microsoft Corporation
    Inventors: Thomas Holcomb, Chih-Lung Lin, Pohsiang Hsu, Sridhar Srinivasan
  • Publication number: 20060072668
    Abstract: A video codec provides for adaptive vertical macroblock alignment of mixed interlaced and progressive video sequences. With adaptive vertical macroblock alignment, a video codec enforces a macroblock alignment height restriction on per picture basis, rather than requiring that all frames in a sequence adhere to a uniform height restriction. The video codec can then apply less padding to progressive and like type pictures that have smaller macroblock alignment increments, than to interlaced type pictures with larger alignment increments, which can save significant compression overhead.
    Type: Application
    Filed: October 6, 2004
    Publication date: April 6, 2006
    Applicant: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Chih-Lung Lin, Thomas Holcomb, Pohsiang Hsu