Abstract: Systems, devices, and methods related to a radar and an artificial neural network are described. For example, the radar can have at least one processing unit configured to execute instructions implementing matrix computation of the artificial neural network. The artificial neural network is configured to identify features in the radar image in an output responsive to an input containing a radar image. Optionally, the radar can further include an image sensor to generate an optical image as part of the input to artificial neural network. Instead of outputting the radar images and/or the optical images, the radar may output a description of the features identified via the artificial neural network from the radar image.

Abstract: A method of artificial neural network computations, including: receiving image data having pixel values; generating, from the pixel values, a column of inputs to a set of artificial neurons; identifying a region of memory cells of the integrated circuit device having threshold voltages programmed to represent a weight matrix for the set of artificial neurons; instructing voltage drivers in the integrated circuit device to apply voltages to the region of memory cells according to the column of inputs; obtaining, based on the region of memory cells responsive to the applied voltages, a first column of data from an operation of multiplication and accumulation applied on the weight matrix and the column of inputs; and applying activation functions of the set of artificial neurons to the first column of data to generate a second column of data representative of outputs of the set of artificial neuron.

Abstract: Methods, systems, and devices for techniques for memory system refresh are described. In some cases, a memory system may prioritize refreshing blocks of memory cells containing control information for the file system of the memory system. For example, the memory system may identify a block of memory cells containing control information and adjust an error threshold for refreshing the blocks of memory cells to be lower than an error threshold for refreshing the blocks of memory cells containing data other than control information. Additionally or alternatively, the memory system may perform a refresh control operation for the block of memory cells with a higher frequency (e.g., more frequently) than for other blocks of memory cells.

Abstract: Systems, methods and apparatuses of lidar sensors of autonomous vehicles. A lidar sensor can include: a memory configured to store a lidar image and an Artificial Neural Network (ANN); an inference engine configured to use the (ANN) to analyze the lidar image and generate inference results; and a communication interface coupled to a computer system of a vehicle to implement an advanced driver assistance system to operate the controls according to the inference results and a sensor data stream generated by sensors configured on the vehicle.

Abstract: Methods, systems, and devices for video stream augmentation using a deep learning device are described. A machine learning device of a vehicle may augment a video stream received from cameras of the vehicle and may output the augmented video stream to a display component of the vehicle. For example, a camera of the vehicle may record a video stream of and a sensor of the vehicle may detect information about an environment associated with the vehicle. The camera and sensor may transmit the video stream and information, respectively, to the machine learning device, which may process and modify the video stream based on parameters of the video stream and/or the information. The machine learning device may transmit the modified video streams to the display component, and the display component may display aspects of the modified video stream on a display of the vehicle, such as a rearview mirror.

Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to execute instructions with matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; a first interface to a memory controller of a Central Processing Unit; and a second interface to an image generator, such as a camera. While the Deep Learning Accelerator is using the random access memory to process current input to the Artificial Neural Network in generating current output from the Artificial Neural Network, the Deep Learning Accelerator may concurrently load next input from the camera into the random access memory; and at the same time, the Central Processing Unit may concurrently retrieve prior output from the random access memory.

Abstract: After data to be written to a storage device, such as a solid state drive (SSD), is received from a host system, the received data is encoded using a first error correction code to generate first parity data. A temperature at which memory cells of the storage device will store the received data is determined. In response, a first portion of the received data is identified (e.g., data in memory storage that is error-prone at a predicted higher temperature that has been determined based on output from an artificial neural network using sensor(s) input). The first portion is encoded using a second error correction code to generate second parity data. The second error correction code has a higher error correction capability than the first error correction code. The encoded first portion, the first parity data, and the second parity data are stored in the memory cells.

Abstract: A method of artificial neural network computations, including: receiving image data having pixel values; generating, from the pixel values, a column of inputs to a set of artificial neurons; identifying a region of memory cells of the integrated circuit device having threshold voltages programmed to represent a weight matrix for the set of artificial neurons; instructing voltage drivers in the integrated circuit device to apply voltages to the region of memory cells according to the column of inputs; obtaining, based on the region of memory cells responsive to the applied voltages, a first column of data from an operation of multiplication and accumulation applied on the weight matrix and the column of inputs; and applying activation functions of the set of artificial neurons to the first column of data to generate a second column of data representative of outputs of the set of artificial neuron.

Abstract: A method to enhance images, including: receiving, in an image processing logic circuit in an integrated circuit device, first data representative of an input image; generating, by the image processing logic circuit, input data for an inference logic circuit in the integrated circuit device; generating, by the inference logic circuit, a column of bits from the input data; performing, by the inference logic circuit using memory cells in the integrated circuit device having threshold voltages programmed to represent at least one weight matrix, operations of multiplication and accumulation, via reading concurrently rows of the memory cells selected according to the column of bits; generating, by the inference logic circuit, output data based on results of the operations multiplication and accumulation; and generating, by the image processing logic circuit using the output data, second data representative of an output image enhanced from the input image.

Abstract: A device configured with redundant computations to improve reliability of using memory cells to perform operations of multiplication and accumulation. The device can have a memory cell array and a logic circuit. Each respective memory cell in the memory cell array has a threshold voltage programmable in a first mode to perform operations of multiplication and accumulation and programmable in a second mode, different from the first mode, to store data. The memory cell array has a plurality of regions operable in parallel to perform redundant operations of multiplication and accumulation. The logic circuit is configured to compare a plurality of results, generated from the redundant operations of multiplication and accumulation performed using the plurality of regions respectively, to select an output result from the plurality of results.

Abstract: A method in an integrated circuit device to compress images, including: generating, by an image processing logic circuit and based on first data representative of an input image, input data; generating, by an inference logic circuit and based on the input data, a column of inputs; converting, by the inference logic circuit using voltage drivers connected to wordlines and memory cells storing a weight matrix, and into output currents of the memory cells summed in bitlines, results of bitwise multiplications of bits in the column of inputs and bits stored in the memory cells in a form of threshold voltages of the memory cells; digitizing currents summed in the bitlines to obtain column outputs; generating, by the inference logic circuit, output data based on the column outputs; and generating, using the output data, second data representative of an output image compressed from the input image.

Abstract: A device having a memory cell array configured with inverted weight data for operations of multiplication and accumulation. Each respective memory cell in the memory cell array has a threshold voltage programmable in a first mode to perform operations of multiplication and accumulation. The memory cell array has a plurality of regions operable in parallel to perform operations of multiplication and accumulation. The plurality of regions include a first region and a second region. At least a second portion of weight bits stored in the second region is an inverted version of a first portion of weight bits stored in the first region. The device includes a logic circuit configured to adjust a computation result of multiplication and accumulation generated using the second region to account for weight inversion and generate an output result based on a plurality of results generated using the plurality of regions respectively.

Abstract: A surveillance camera having: an image sensing pixel array operable to generate first data representative of an input image; a memory cell array having memory cells, wherein threshold voltages of the memory cells are programmable in a first mode to store weight matrices and programmable in a second mode to store second data representative of an output image generated from the input image; voltage drivers; current digitizers; an inference logic circuit operable to perform operations of multiplication and accumulation using the voltage drivers, the current digitizers, and a first portion of the memory cells programmed in the first mode to store the weight matrices used in generation of the output image; a transceiver; and a microprocessor configured to use the transceiver to communicate, to a computer system, a report identifying the output image stored in the memory cell array.

Abstract: A method to balance computation accuracy and energy consumption, including: programming thresholds voltages of first memory cells to store first weight matrices representative of a first artificial neural network; programming thresholds voltages of second memory cells to store second weight matrices representative of a second artificial neural network smaller than the first artificial neural network, where both the first artificial neural network and the second artificial neural network are operable to provide at least one common functionality in processing each of the inputs; selecting configurations of using the first memory cells, or the second memory cells, or both in processing a sequence of inputs; and performing, according to the configurations, operations of multiplication and accumulation using the first memory cells, and the second memory cells in computations of the first artificial neural network and the second artificial neural network in processing the sequence of the inputs.

Abstract: An integrated circuit device having a memory cell array with first layers of memory cells configured for operations of multiplication and accumulation. Each pair of closest layers among the first layers are configured to be separate by at least one layer in second layers of memory cells, where access to, or usages of, the second layers can be restricted or limited to prevent activities in the second layers from corrupting the weight programming in the first layers.

Abstract: A method for a digital camera adaptable to monitor a scene to detect a condition of interest to a user. The digital camera can program, in a first mode, first memory cells according to first weight matrices to classify images captured by the digital camera. Second memory cells are programmed in a second mode to store data representative of the images. The digital camera can perform operations of multiplication and accumulation using the first memory cells to compute first classifications of the images. In response to mismatches between the first classifications and second classifications identified by the user for the images, the digital camera can execute instructions to determine second weight matrices and program, in the first mode, third memory cells, according to the second weight matrices for improved capability in detecting the condition represented by image classifications in a predetermined category.

Abstract: An integrated circuit device having a mechanism to check calibration of memory cells configured to perform operations of multiplication and accumulation. The integrated circuit device programs, in a first mode, threshold voltages of first memory cells in a memory cell array to store weight data, and programs, in a second mode, threshold voltages of second memory cells in the memory cell array to store a first result of applying an operation of multiplication and accumulation to a sample input and the weight data. During a calibration check, the integrated circuit device performs the operation using the first memory cells to obtain a second result, and compares the first result, retrieved from the second memory cells, and the second result to determine whether calibration of output current characteristics of the first memory cells programmed in the first mode is corrupted.

Abstract: An integrated circuit device including: a first integrated circuit die having an image sensing pixel array; a second integrated circuit die having an image processing logic circuit and an inference logic circuit; and a third integrated circuit die having a memory cell array. The second integrated circuit die and the third integrated circuit die are connected via a direct bond interconnect. The inference logic circuit is configured to process an image from the image sensing pixel array via multiplication and accumulation operations based on memory cells in the memory cell array having threshold voltages programmed to store data in multiplications and output currents from the memory cells connected to lines in summations.

Abstract: A system includes a data storage device and a host computing device. The data storage device includes a host interface; integrated circuit memory cells; and a processing device. The processing device is configured to execute firmware to perform operations requested by commands received via the host interface and maintenance operations identified by the processing device independent of commands received via the host interface. The host computing device is coupled to the host interface to provide commands with addresses to access the integrated circuit memory cells according to the address. In response to a request, the host computing device is configured to reduce, to below a threshold, a rate of transmitting to the host interface commands to access integrated circuit memory cells; and power up the data storage device to cause the data storage device to perform the maintenance operations.

Abstract: In some implementations, an extended reality (XR) device may receive, from a server, a request to resolve an item that is misplaced in a physical retail store, wherein the request indicates a misplaced location associated with the item. The XR device may provide, via an interface, a notification of the request, wherein the notification includes an option to accept the request. The XR device may receive, via the interface, an indication that the request has been accepted. The XR device may transmit, to the server, the indication that the request has been accepted. The XR device may provide, via the interface, an in-store navigation path to direct a user of the XR device via overlayed audio-visual cues to the misplaced location to pick up the item.