Abstract: Systems and methods for improved texture mapping and graphics processing are described. According to an example implementation, whole or parts of texture blocks are prefetched to an intermediate cache by a processing unit so that the same processing unit or another processing unit can subsequently obtain the prefetched texture block from the intermediate cache. Moreover, in some example implementations, control circuitry associated with the intermediate cache may throttle prefetch requests in order to avoid the memory system and/or the interconnect system receiving excessive amounts of prefetch requests. Additionally, in some implementations, deduplication of prefetch requests can be performed at the intermediate cache and/or the processing unit. Some implementations also include an efficient technique for calculating the address of the next texture block to be prefetched.