Patents by Inventor Prasad N. Atkar

Prasad N. Atkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11468656
    Abstract: A method comprising identifying a plurality of non-overlapping coarse domains of a region of interest; selecting a subset of the plurality of coarse domains based on a plurality of first diversity metrics determined for the plurality of coarse domains; identifying a plurality of non-overlapping fine domains of the region of interest, wherein each of the fine domains is a portion of one of the coarse domains of the selected subset of the plurality of coarse domains; selecting a subset of the plurality of fine domains based on a plurality of second diversity metrics determined for the plurality of coarse domains; and providing an indication of the selected subset of the plurality of fine domains.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: October 11, 2022
    Assignee: Intel Corporation
    Inventors: Bikram Baidya, Prasad N. Atkar, Vivek K. Singh, Md Ashraful Alam
  • Patent number: 11010525
    Abstract: A search engine receives data describing reference geometry and generates a hash based on the reference geometry. A reference bloom filter is generated for the reference geometry based on the hash. The search engine performs a search to determine whether instances of the reference geometry are present in an integrated circuit (IC) layout. The search includes comparing the reference bloom filter with each one of a plurality of bloom filters corresponding to a plurality of subdomains of the IC layout. Based on results of the comparison, one or more subdomains of interest are identified and searched to determine whether the particular reference geometry is present in the subdomain.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: May 18, 2021
    Assignee: Intel Corporation
    Inventors: Bikram Baidya, John A. Swanson, Prasad N. Atkar, Vivek K. Singh, Aswin Sreedhar
  • Patent number: 10885259
    Abstract: An improved random forest model is provided, which has been trained based on silicon data generated from tests of previously fabricated chips. An input is provided to the random forest model, the input including a feature set of a pattern within a particular chip layout, the feature set identifying geometric attributes of polygonal elements within the pattern. A result is generated by the random forest model based on the input, where the result identifies a predicted attribute of the pattern based on the silicon data, and the result is generated based at least in part on determining, within the random forest model, that geometric attributes of the pattern were included in the previously fabricated chips, where the previously fabricated chips have chip layouts are different from the particular chip layout.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: January 5, 2021
    Assignee: Intel Corporation
    Inventors: Bikram Baidya, John A. Swanson, Kumara Sastry, Prasad N. Atkar, Vivek K. Singh
  • Publication number: 20200004921
    Abstract: An improved random forest model is provided, which has been trained based on silicon data generated from tests of previously fabricated chips. An input is provided to the random forest model, the input including a feature set of a pattern within a particular chip layout, the feature set identifying geometric attributes of polygonal elements within the pattern. A result is generated by the random forest model based on the input, where the result identifies a predicted attribute of the pattern based on the silicon data, and the result is generated based at least in part on determining, within the random forest model, that geometric attributes of the pattern were included in the previously fabricated chips, where the previously fabricated chips have chip layouts are different from the particular chip layout.
    Type: Application
    Filed: August 30, 2019
    Publication date: January 2, 2020
    Inventors: Bikram Baidya, John A. Swanson, Kumara Sastry, Prasad N. Atkar, Vivek K. Singh
  • Publication number: 20190325103
    Abstract: A search engine receives data describing reference geometry and generates a hash based on the reference geometry. A reference bloom filter is generated for the reference geometry based on the hash. The search engine performs a search to determine whether instances of the reference geometry are present in an integrated circuit (IC) layout. The search includes comparing the reference bloom filter with each one of a plurality of bloom filters corresponding to a plurality of subdomains of the IC layout. Based on results of the comparison, one or more subdomains of interest are identified and searched to determine whether the particular reference geometry is present in the subdomain.
    Type: Application
    Filed: June 29, 2019
    Publication date: October 24, 2019
    Inventors: Bikram Baidya, John A. Swanson, Prasad N. Atkar, Vivek K. Singh, Aswin Sreedhar
  • Publication number: 20190325246
    Abstract: A method comprising identifying a plurality of non-overlapping coarse domains of a region of interest; selecting a subset of the plurality of coarse domains based on a plurality of first diversity metrics determined for the plurality of coarse domains; identifying a plurality of non-overlapping fine domains of the region of interest, wherein each of the fine domains is a portion of one of the coarse domains of the selected subset of the plurality of coarse domains; selecting a subset of the plurality of fine domains based on a plurality of second diversity metrics determined for the plurality of coarse domains; and providing an indication of the selected subset of the plurality of fine domains.
    Type: Application
    Filed: June 29, 2019
    Publication date: October 24, 2019
    Inventors: Bikram Baidya, Prasad N. Atkar, Vivek K. Singh, Md Ashraful Alam