Patents by Inventor Pratap Subrahmanyam

Pratap Subrahmanyam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10977074
    Abstract: A virtual-machine-based system that identifies an application or process in a virtual machine in order to locate resources associated with the identified application. Access to the located resources is then controlled based on a context of the identified application. Those applications without the necessary context will have a different view of the resource.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: April 13, 2021
    Inventors: Xiaoxin Chen, Carl A. Waldspurger, Pratap Subrahmanyam
  • Patent number: 10929295
    Abstract: Described herein is a method for tracking changes made by an application. Embodiments include determining, by a processor, a write-back of a cache line from a hardware unit associated with a socket of a plurality of sockets to a page table entry of a page table in a memory location associated with the processor. Embodiments include adding, by the processor, the cache line to a list of dirty cache lines. Embodiments include, for each respective cache line in the list of dirty cache lines, identifying, by the processor, a memory location associated with a respective socket of the plurality of sockets corresponding to the respective cache line and updating, by the processor, an entry of a page table replica at the memory location based on the respective cache line.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: February 23, 2021
    Assignee: VMware, Inc.
    Inventors: Jayneel Gandhi, Pratap Subrahmanyam, Irina Calciu, Aasheesh Kolli
  • Patent number: 10929235
    Abstract: Techniques for achieving application high availability via crash-consistent asynchronous replication of persistent data are provided. In one set of embodiments, an application running on a computer system can, during runtime of the application: write persistent data to a local nonvolatile data store of the computer system, write one or more log entries comprising the persistent data to a local log region of the computer system, and asynchronously copy the one or more log entries to one or more remote destinations. Then, upon detecting a failure that prevents the application from continuing execution, the computer system can copy the local log region or a remaining portion thereof to the one or more remote destinations, where the copying is performed while the computer system runs on battery power and where the application is restarted on another computer system using a persistent state derived from the copied log entries.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: February 23, 2021
    Assignee: VMware, Inc.
    Inventors: Pratap Subrahmanyam, Rajesh Venkatasubramanian, Kiran Tati, Qasim Ali, Marcos Aguilera, Irina Calciu, Venkata Subhash Reddy Peddamallu, Xavier Deguillard, Yi Yao
  • Patent number: 10929234
    Abstract: Techniques for implementing application fault tolerance via battery-backed replication of volatile state are provided. In one set of embodiments, a primary host system can detect a failure that causes an application of the primary host system to stop running. In response to detecting the failure, the primary host system can replicate volatile state that is used by the application to a secondary host system, where the secondary host system maintains a copy of the application, and where execution of the application is failed over to the copy on the secondary host system using the replicated volatile state.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: February 23, 2021
    Assignee: VMware, Inc.
    Inventors: Kiran Tati, Qasim Ali, Wei Xu, Rajesh Venkatasubramanian, Pratap Subrahmanyam
  • Patent number: 10929233
    Abstract: Techniques for achieving application high availability via application-transparent battery-backed replication of persistent data are provided. In one set of embodiments, a computer system can detect a failure that causes an application of the computer system to stop running. In response to detecting the failure, the computer system can copy persistent data written by the application and maintained locally at the computer system to one or more remote destinations, where the copying is performed in a manner that is transparent to the application and while the computer system runs on battery power. The application can then be restarted on another computer system using the copied data.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: February 23, 2021
    Assignee: VMWARE, INC.
    Inventors: Pratap Subrahmanyam, Rajesh Venkatasubramanian, Kiran Tati, Qasim Ali, Marcos Aguilera, Irina Calciu, Venkata Subhash Reddy Peddamallu, Xavier Deguillard, Yi Yao
  • Publication number: 20210034600
    Abstract: Techniques for using commit coalescing when performing micro-journal-based transaction logging are provided. In one embodiment a computer system can maintain, in a volatile memory, a globally ascending identifier, a first list of free micro-journals, and a second list of in-flight micro-journals. The computer system can further receive a transaction comprising a plurality of modifications to data or metadata stored in the byte-addressable persistent memory, select a micro-journal from the first list, obtain a lock on the globally ascending identifier, write a current value of the globally ascending identifier as a journal commit identifier into a header of the micro-journal, and write journal entries into the micro-journal corresponding to the plurality of modifications included in the transaction. The computer system can then commit the micro-journal to the byte-addressable persistent memory, increment the current value of the globally ascending identifier, and release the lock.
    Type: Application
    Filed: October 16, 2020
    Publication date: February 4, 2021
    Inventors: Pratap Subrahmanyam, Zongwei Zhou, Xavier Deguillard, Rajesh Venkatasubramanian
  • Publication number: 20210019168
    Abstract: The disclosure provides an approach for creating a pool of memory out of local memories of host machines, and providing that pool for the hosts to use. The pool is managed by a controller that keeps track of memory usage and allocated memory among hosts. The controller allocates or reclaims memory between hosts, as needed by the hosts. Memory allocated from a second host to a first host may then be divided into smaller portions by the first host, and further allocated to virtual machines executing within the first host.
    Type: Application
    Filed: November 28, 2019
    Publication date: January 21, 2021
    Inventors: Marcos Aguilera, Keerthi Kumar, Pramod Kumar, Arun Ramanathan, Pratap Subrahmanyam, Sairam Veeraswamy, Rajesh Venkatasubramanian, Manish Mishra
  • Patent number: 10859289
    Abstract: To generate a checkpoint for a virtual machine (VM), first, while the VM is still running, a copy-on-write (COW) disk file is created pointing to a parent disk file that the VM is using. Next, the VM is stopped, the VM's memory is marked COW, the device state of the VM is saved to memory, the VM is switched to use the COW disk file, and the VM begins running again for substantially the remainder of the checkpoint generation. Next, the device state that was stored in memory and the unmodified VM memory pages are saved to a checkpoint file. Also, a copy may be made of the parent disk file for retention as part of the checkpoint, or the original parent disk file may be retained as part of the checkpoint. If a copy of the parent disk file was made, then the COW disk file may be committed to the original parent disk file.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: December 8, 2020
    Assignee: VMware, Inc.
    Inventors: Carl A. Waldspurger, Michael Nelson, Daniel J. Scales, Pratap Subrahmanyam
  • Patent number: 10846280
    Abstract: Techniques for using commit coalescing when performing micro-journal-based transaction logging are provided. In one embodiment a computer system can maintain, in a volatile memory, a globally ascending identifier, a first list of free micro-journals, and a second list of in-flight micro-journals. The computer system can further receive a transaction comprising a plurality of modifications to data or metadata stored in the byte-addressable persistent memory, select a micro-journal from the first list, obtain a lock on the globally ascending identifier, write a current value of the globally ascending identifier as a journal commit identifier into a header of the micro-journal, and write journal entries into the micro-journal corresponding to the plurality of modifications included in the transaction. The computer system can then commit the micro-journal to the byte-addressable persistent memory, increment the current value of the globally ascending identifier, and release the lock.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: November 24, 2020
    Assignee: VMware, Inc.
    Inventors: Pratap Subrahmanyam, Zongwei Zhou, Xavier Deguillard, Rajesh Venkatasubramanian
  • Patent number: 10817389
    Abstract: A module for rewriting application code as a failure-atomic transaction is disclosed. An application delineates a code fragment that is to become a failure-atomic transaction by writing a tx_begin( ) and tx_end( ) functions into its code. A module detects the tx_begin( ) and tx_end( ) functions and rewrites the code fragment as a failure-atomic transaction. The rewritten code is then available to be executed by the application. The rewritten code stores values and locations of stores to persistent memory locations so that the transaction can be either undone or redone in the case of an application error or a power failure. If the transaction is an undo type of transaction, the application can be rolled back to a state prior to the failure. If the transaction is a redo type of transaction, the application can be advanced to a correct state after the error.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: October 27, 2020
    Assignee: VMware, Inc.
    Inventors: Aasheesh Kolli, Irina Calciu, Jayneel Gandhi, Pratap Subrahmanyam
  • Patent number: 10761984
    Abstract: Disclosed are embodiments for running an application on a local processor when the application is dependent on pages not locally present but contained in a remote host. The system is informed that the pages on which the application depends are locally present. While running, the application encounters a cache miss and a cache line satisfying the miss from the remote host is obtained and provided to the application. Alternatively, the page containing the cache line satisfying the miss is obtained and the portion of the page not including the cache line is stored locally while the cache line is provided to the application. The cache miss is discovered by monitoring coherence events on a coherence interconnect connected to the local processor. In some embodiments, the cache misses are tracked and provide a way to predict a set of pages to be pre-fetched in anticipation of the next cache misses.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: September 1, 2020
    Assignee: VMware, Inc.
    Inventors: Irina Calciu, Jayneel Gandhi, Aasheesh Kolli, Pratap Subrahmanyam
  • Publication number: 20200242035
    Abstract: Described herein is a method for tracking changes to memory locations made by an application. In one embodiment, the application decides to start tracking and sends a list of virtual memory pages to be tracked to an operating system via an interface. The operating system converts the list of virtual memory pages to a list of physical addresses and sends the list of physical addresses to a hardware unit which performs the tracking by detecting write backs on a coherence interconnect coupled to the hardware unit. After the application ends tracking, the application requests a list of dirty cache lines. In response to the request, the operating system obtains the list of dirty cache lines from the hardware unit and adds the list to a buffer that the application can read. In other embodiments, the operating system can perform the tracking without the application making the request.
    Type: Application
    Filed: January 24, 2019
    Publication date: July 30, 2020
    Inventors: Aasheesh KOLLI, Irina CALCIU, Jayneel GANDHI, Pratap SUBRAHMANYAM
  • Publication number: 20200241978
    Abstract: A module for rewriting application code as a failure-atomic transaction is disclosed. An application delineates a code fragment that is to become a failure-atomic transaction by writing a tx_begin( ) and tx_end( ) functions into its code. A module detects the tx_begin( ) and tx_end( ) functions and rewrites the code fragment as a failure-atomic transaction. The rewritten code is then available to be executed by the application. The rewritten code stores values and locations of stores to persistent memory locations so that the transaction can be either undone or redone in the case of an application error or a power failure. If the transaction is an undo type of transaction, the application can be rolled back to a state prior to the failure. If the transaction is a redo type of transaction, the application can be advanced to a correct state after the error.
    Type: Application
    Filed: January 24, 2019
    Publication date: July 30, 2020
    Inventors: Aasheesh KOLLI, Irina CALCIU, Jayneel GANDHI, Pratap SUBRAHMANYAM
  • Publication number: 20200242036
    Abstract: Disclosed is a technique in which an application can record changes it makes to physical memory. In the technique, the application specifies a virtual memory region which is converted to a plurality of cache lines, each of which is monitored for changes by a device connected to a coherence interconnect coupled to the processor caches. The application sends a start signal to start the logging process and an end signal to stop the process. During the logging process, when a change occurs to one of the cache lines, an undo entry corresponding to the change is created and entered into a transaction log residing in persistent memory. The transaction log containing the undo entries makes the set of changes recorded in the transaction log atomic. If a failure occurs, the recorded changes can be undone as if they never occurred.
    Type: Application
    Filed: January 24, 2019
    Publication date: July 30, 2020
    Inventors: Aasheesh KOLLI, Irina CALCIU, Jayneel GANDHI, Pratap SUBRAHMANYAM
  • Publication number: 20200233804
    Abstract: Described herein is a method for tracking changes made by an application. Embodiments include determining, by a processor, a write-back of a cache line from a hardware unit associated with a socket of a plurality of sockets to a page table entry of a page table in a memory location associated with the processor. Embodiments include adding, by the processor, the cache line to a list of dirty cache lines. Embodiments include, for each respective cache line in the list of dirty cache lines, identifying, by the processor, a memory location associated with a respective socket of the plurality of sockets corresponding to the respective cache line and updating, by the processor, an entry of a page table replica at the memory location based on the respective cache line.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 23, 2020
    Inventors: Jayneel GANDHI, Pratap SUBRAHMANYAM, Irina CALCIU, Aasheesh KOLLI
  • Patent number: 10706005
    Abstract: Exemplary methods, apparatuses, and systems include a distributed memory agent within a first node intercepting an operating system request to open a file from an application running on the first node. The request includes a file identifier, which the distributed memory agent transmits to a remote memory manager. The distributed memory agent receives, from the remote memory manager, a memory location within a second node for the file identifier and information to establish a remote direct memory access channel between the first node and the second node. In response to the request to open the file, the distributed memory agent establishes the remote direct memory access channel between the first node and the second node. The remote direct memory access channel allows the first node to read directly from or write directly to the memory location within the second node while bypassing an operating system of the second node.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: July 7, 2020
    Assignee: VMware, Inc.
    Inventors: Michael Wei, Marcos Aguilera, Irina Calciu, Stanko Novakovic, Lalith Suresh, Jayneel Gandhi, Nadav Amit, Pratap Subrahmanyam, Xavier Deguillard, Kiran Tati, Rajesh Venkatasubramanian
  • Patent number: 10592425
    Abstract: Techniques for virtualizing NVDIMM WPQ flushing with minimal overhead are provided. In one set of embodiments, a hypervisor of a computer system can allocate a virtual flush hint address (FHA) for a virtual machine (VM), where the virtual flush hint address is associated with one or more physical FHAs corresponding to one or more physical memory controllers of the computer system. The hypervisor can further determine whether one or more physical NVDIMMs of the computer system support WPQ flushing. If so, the hypervisor can write protect a guest physical address (GPA) to host physical address (HPA) mapping for the virtual FHA in the page tables of the computer system, thereby enabling the hypervisor to trap VM writes to the virtual FHA and propagate those write to the physical FHAs of the system.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: March 17, 2020
    Assignee: VMware, Inc.
    Inventors: Doug Covelli, Rajesh Venkatasubramanian, Richard Brunner, Pratap Subrahmanyam
  • Publication number: 20200042413
    Abstract: Techniques for implementing high availability for persistent memory are provided. In one embodiment, a first computer system can detect an alternating current (AC) power loss/cycle event and, in response to the event, can save data in a persistent memory of the first computer system to a memory or storage device that is remote from the first computer system and is accessible by a second computer system. The first computer system can then generate a signal for the second computer system subsequently to initiating or completing the save process, thereby allowing the second computer system to restore the saved data from the memory or storage device into its own persistent memory.
    Type: Application
    Filed: September 26, 2019
    Publication date: February 6, 2020
    Inventors: Pratap Subrahmanyam, Rajesh Venkatasubramanian, Kiran Tati, Qasim Ali
  • Publication number: 20200042357
    Abstract: Techniques for implementing OS/hypervisor-based persistent memory are provided. In one embodiment, an OS or hypervisor running on a computer system can allocate a portion of the volatile memory of the computer system as a persistent memory allocation. The OS/hypervisor can further receive a signal from the computer system's BIOS indicating an AC power loss or cycle event and, in response to the signal, can save data in the persistent memory allocation to a nonvolatile backing store. Then, upon restoration of AC power to the computer system, the OS/hypervisor can restore the saved data from the nonvolatile backing store to the persistent memory allocation.
    Type: Application
    Filed: September 26, 2019
    Publication date: February 6, 2020
    Inventors: Venkata Subhash Reddy Peddamallu, Kiran Tati, Rajesh Venkatasubramanian, Pratap Subrahmanyam
  • Publication number: 20200034297
    Abstract: A device is connected via a coherence interconnect to a CPU with a cache. The device monitors cache coherence events via the coherence interconnect, where the cache coherence events relate to the cache of the CPU. The device also includes a buffer that can contain representations, such as addresses, of cache lines. If a coherence event occurs on the coherence interconnect indicating that a cache line in the CPU's cache is dirty, then the device is configured to add an entry to the buffer to record the dirty cache line.
    Type: Application
    Filed: July 27, 2018
    Publication date: January 30, 2020
    Inventors: Irina CALCIU, Jayneel GANDHI, Aasheesh KOLLI, Pratap SUBRAHMANYAM