Patents by Inventor Raihan M. Tarafdar

Raihan M. Tarafdar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230326790
    Abstract: Methods of filling features including metal and dielectric surfaces with conductive materials involve cleaning the metal surfaces with little or no damage to the dielectric surfaces. After cleaning, the feature may be exposed to one or more reactants to fill the feature with the conductive material in an atomic layer deposition (ALD) or chemical vapor deposition (CVD) process. Deposition may be selective or non-selective to the metal surface. In some embodiments, the filled feature is barrier-less, such that the conductive material directly contacts the metal and dielectric surfaces with no interposing barrier or adhesion layer.
    Type: Application
    Filed: May 21, 2021
    Publication date: October 12, 2023
    Applicant: Lam Research Corporation
    Inventors: Raihan M. TARAFDAR, Chiukin Steven LAI, Jeong-Seok NA
  • Patent number: 7790633
    Abstract: A silicon dioxide-based dielectric layer is formed on a substrate surface by a sequential deposition/anneal technique. The deposited layer thickness is insufficient to prevent substantially complete penetration of annealing process agents into the layer and migration of water out of the layer. The dielectric layer is then annealed, ideally at a moderate temperature, to remove water and thereby fully densify the film. The deposition and anneal processes are then repeated until a desired dielectric film thickness is achieved.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: September 7, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Raihan M. Tarafdar, George D. Papasouliotis, Ron Rulkens, Dennis M. Hausmann, Jeff Tobin, Adrianne K. Tipton, Bunsen Nie
  • Patent number: 7482247
    Abstract: Conformal nanolaminate dielectric deposition and etch back processes that can fill high aspect ratio (typically at least 5:1, for example 6:1), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps with significantly reduced incidence of voids or weak spots involve the use of any suitable confirmal dielectric deposition technique and a dry etch back. The etch back part of the process involves a single step or an integrated multi-step (for example, two-step) procedure including an anisotropic dry etch followed by an isotropic dry etch. The all dry deposition and etch back process in a single tool increases throughput and reduces handling of wafers resulting in more efficient and higher quality nanolaminate dielectric gap fill operations.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: January 27, 2009
    Assignee: Novellus Systems, Inc.
    Inventors: George D. Papasouliotis, Raihan M. Tarafdar, Ron Rulkins, Dennis M. Hausmann, Jeff Tobin, Adrianne K. Tipton, Bunsen Nie, Wai-Fan Yau, Brian G. Lu, Timothy M. Archer, Sasson Roger Somekh
  • Patent number: 7297608
    Abstract: A method employing atomic layer deposition rapid vapor deposition (RVD) conformally deposits a dielectric material on small features of a substrate surface. The resulting dielectric film is then annealed using a high density plasma (HDP) at a temperature under 500° C. in an oxidizing environment. The method includes the following three principal operations: exposing a substrate surface to an aluminum-containing precursor gas to form a substantially saturated layer of aluminum-containing precursor on the substrate surface; exposing the substrate surface to a silicon-containing precursor gas to form the dielectric film; and annealing the dielectric film in a low temperature oxygen-containing high density plasma. The resulting film has improved mechanical properties, including minimized seams, improved WERR, and low intrinsic stress, comparable to a high temperature annealing process (˜800° C.), but without exceeding the thermal budget limitations of advanced devices.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: November 20, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: George D. Papasouliotis, Raihan M. Tarafdar, Ron Rulkens, Dennis M. Hausmann, Jeff Tobin, Adrianne K. Tipton, Bunsen Nie
  • Patent number: 7294583
    Abstract: A method for depositing conformal dielectric films uses alkoxy silanol or silanediol precursors and oxidizing and/or hydrolyzing agents. The method produces a material with liquid-like flow properties capable of achieving improved high aspect ratio gap fill more efficiently than previous methods using alkoxysilanes since fewer oxidation reactions are required. In addition, the dielectric can be formed with or without a metal-containing catalyst/nucleation layer, so that metal content in the dielectric film can be avoided, if desired. Seams and voids are therefore avoided in gaps filled more efficiently with higher quality dielectric. In addition, the films as dense as deposited, reducing or eliminating the need for post-deposition processing (e.g., annealing).
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: November 13, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Ron Rulkens, George D. Papasouliotis, Dennis M. Hausmann, Raihan M. Tarafdar, Bunsen Nie, Adrianne K. Tipton, Jeff Tobin
  • Patent number: 7271112
    Abstract: Methods of forming conformal films with increased density are described. The methods may be used to improve gap fill in semiconductor device manufacturing by eliminating seams and voids. The methods involve operating at high reactant partial pressure. Additionally, film properties may be further enhanced by optimizing the temperature of the substrate during exposure to the metal-containing and/or silicon-containing precursor gases commonly used in conformal film deposition techniques such as ALD and PDL.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: September 18, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: George D. Papasouliotis, Raihan M. Tarafdar, Adrianne K. Tipton, Ron Rulkens, Dennis M. Hausmann, Jeff Tobin
  • Patent number: 7223707
    Abstract: A method for using ALD and RVD techniques in semiconductor manufacturing to produce a smooth nanolaminate dielectric film, in particular for filling structures with doped or undoped silica glass, uses dynamic process conditions. A dynamic process using variable substrate (e.g., wafer) temperature, reactor pressure and/or reactant partial pressure, as opposed to static process conditions through various cycles, can be used to minimize film roughness and improve gap fill performance and film properties via the elimination or reduction of seam occurrence. Overall film roughness can be reduced by operating the initial growth cycle under conditions which optimize film smoothness, and then switching to conditions that will enhance conformality, gap fill and film properties for the subsequent process cycles. Film deposition characteristics can be changed by modulating one or more of a number of process parameters including wafer temperature, reactor pressure, reactant partial pressure and combinations of these.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 29, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: George D. Papasouliotis, Jeff Tobin, Ron Rulkens, Dennis M. Hausmann, Adrianne K. Tipton, Raihan M. Tarafdar, Bunsen Nie
  • Patent number: 7202185
    Abstract: An method employing atomic layer deposition (ALD) and rapid vapor deposition (RVD) techniques conformally deposits a dielectric material on small features of a substrate surface. The resulting dielectric film has a low dielectric constant and a high degree of surface smoothness. The method includes the following three principal operations: exposing a substrate surface to an aluminum-containing precursor gas to form a saturated layer of aluminum-containing precursor on the substrate surface; exposing the substrate surface to an oxygen-containing gas to oxidize the layer of aluminum-containing precursor; and exposing the substrate surface to a silicon-containing precursor gas to form the dielectric film. Generally an inert gas purge is employed between the introduction of reactant gases to remove byproducts and unused reactants. These operations can be repeated to deposit multiple layers of dielectric material until a desired dielectric thickness is achieved.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: April 10, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Dennis M. Hausmann, Jeff Tobin, George D. Papasouliotis, Ron Rulkens, Raihan M. Tarafdar, Adrianne K. Tipton, Bunsen Nie
  • Patent number: 7148155
    Abstract: A silicon dioxide-based dielectric layer is formed on a substrate surface by a sequential deposition/anneal technique. The deposited layer thickness is insufficient to prevent substantially complete penetration of annealing process agents into the layer and migration of water out of the layer. The dielectric layer is then annealed, ideally at a moderate temperature, to remove water and thereby fully densify the film. The deposition and anneal processes are then repeated until a desired dielectric film thickness is achieved.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: December 12, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Raihan M. Tarafdar, George D. Papasouliotis, Ron Rulkens, Dennis M. Hausmann, Jeff Tobin, Adrianne K. Tipton, Bunsen Nie
  • Patent number: 7129189
    Abstract: An method employing atomic layer deposition (ALD) and rapid vapor deposition (RVD) techniques conformally deposits a dielectric material on small features of a substrate surface. The resulting dielectric film applies a phosphate-doped silicate film using atomic layer deposition (ALD) and rapid surface catalyzed vapor deposition (RVD). The method includes the following four principal operations: exposing a substrate surface to an aluminum-containing precursor gas to form a substantially saturated layer of aluminum-containing precursor on the substrate surface; exposing the substrate surface to a phosphate-containing precursor gas to form aluminum phosphate on the substrate surface; exposing the substrate surface to an aluminum-containing precursor gas to form a second substantially saturated layer of aluminum-containing precursor on the substrate surface; and exposing the substrate surface to a silicon-containing precursor gas to form the dielectric film.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: October 31, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Dennis M. Hausmann, Adrianne K. Tipton, Bunsen Nie, George D. Papasouliotis, Ron Rulkens, Raihan M. Tarafdar
  • Patent number: 7097878
    Abstract: A method employing rapid vapor deposition (RVD) deposits a dielectric material on small features of a substrate surface. The resulting dielectric film is thicker, faster growing, shows better gap fill performance and has improved film properties compared to films resulting from silicon precursors with identical alkoxy substituents on silicon. The method includes the following two principal operations: exposing a substrate surface to a metal-containing precursor gas to form a substantially saturated layer of metal-containing precursor on the substrate surface; and exposing the substrate surface to a mixed alkoxy-substituted silicon-containing precursor gas to form the dielectric film.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: August 29, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Ron Rulkens, Dennis M. Hausmann, Raihan M. Tarafdar, George D. Papasouliotis, Bunsen Nie, Adrianne K. Tipton, Jeff Tobin
  • Patent number: 6846745
    Abstract: Chemical vapor deposition processes are employed to fill high aspect ratio (typically at least 3:1), narrow width (typically 1.5 microns or less and even sub 0.15 micron) gaps with significantly reduced incidence of voids or weak spots. This deposition process involves the use of both hydrogen and fluorine as process gases in the reactive mixture of a plasma-containing CVD reactor. The process gas also includes dielectric forming precursors such as silicon and oxygen-containing molecules.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: January 25, 2005
    Assignee: Novellus Systems, Inc.
    Inventors: George D. Papasouliotis, Vishal Gauri, Raihan M. Tarafdar, Vikram Singh