Abstract: The disclosure relates in some aspects to managing paging area information for a user terminal (UT) and connection signaling. In some aspects, paging area information is provided for an idle UT by defining a default paging area code (PAC) that is known by the network and the UT. In some aspects, paging area information is communicated via connection signaling. In some aspects, connection signaling may be used to force a UT to invoke an update procedure (e.g., a reconnection).

Abstract: Described is a low power, high-density non-volatile differential memory bit-cell. The transistors of the differential memory bit-cell can be planar or non-planer and can be fabricated in the frontend or backend of a die. A bit-cell of the non-volatile differential memory bit-cell comprises first transistor first non-volatile structure that are controlled to store data of a first value. Another bit-cell of the non-volatile differential memory bit-cell comprises second transistor and second non-volatile structure that are controlled to store data of a second value, wherein the first value is an inverse of the second value. The first and second volatile structures comprise ferroelectric material (e.g., perovskite, hexagonal ferroelectric, improper ferroelectric).

Abstract: A method and a system for facilitating transactions are provided. A first payment mode is linked to one or more payment modes by a server. A first authorization option presented on a graphical interface of a terminal device enables a user to initiate a transaction using the first payment mode. One or more unique identifiers of the one or more payment modes, respectively, are communicated to the terminal device by the server based on a transaction request of the transaction. A first unique identifier, associated with a second payment mode that is linked to the first payment mode, is selected from the one or more unique identifiers. A selection notification indicating the selection of the first unique identifier is received by the server and a transaction amount of the transaction is charged to the second payment mode, when the transaction is authorized.

Abstract: A message may be too long to be sent all at once. For example, there may be a limit on the number of bits that can be transmitted by a device operating in a power-save mode. The disclosure relates in some aspects to sending a message over packet boundaries (e.g., several frames or sub-frames). The disclosure relates in some aspects to segmenting a Broadcast Information Block and sending the resulting segments over broadcast information window boundaries. In some aspects, this information may be sent via overhead channels. To facilitate this segmentation, information about the segmentation may be included in the information sent from the transmitter to the receiver. For example, a first segment may indicate the number of segments and subsequent segments may indicate the segment number.

Abstract: Systems and methods for performance-based content delivery are disclosed. A performance management service can define client performance categories based on performance data regarding content requesting, delivery and rendering, and thereby enable content providers to generate or update content based on characteristics of different performance categories in order to improve user experience. The performance management service may also predict performance categories for clients with respect to their currently submitted content requests based on applicable client classification criteria. The performance management service can provide the category prediction to content providers so that a version of the requested content appropriate for the predicted category is transmitted to the client.

Abstract: Described is a packaging technology to improve performance of an AI processing system. An IC package is provided which comprises: a substrate; a first die on the substrate, and a second die stacked over the first die. The first die includes memory and the second die includes computational logic. The first die comprises a ferroelectric RAM (FeRAM) having bit-cells. Each bit-cell comprises an access transistor and a capacitor including ferroelectric material. The access transistor is coupled to the ferroelectric material. The FeRAM can be FeDRAM or FeSRAM. The memory of the first die may store input data and weight factors. The computational logic of the second die is coupled to the memory of the first die. The second die is an inference die that applies fixed weights for a trained model to an input data to generate an output. In one example, the second die is a training die that enables learning of the weights.

Abstract: Described is a packaging technology to improve performance of an AI processing system. An IC package is provided which comprises: a substrate; a first die on the substrate, and a second die stacked over the first die. The first die includes memory and the second die includes computational logic. The first die comprises a ferroelectric RAM (FeRAM) having bit-cells. Each bit-cell comprises an access transistor and a capacitor including ferroelectric material. The access transistor is coupled to the ferroelectric material. The FeRAM can be FeDRAM or FeSRAM. The memory of the first die may store input data and weight factors. The computational logic of the second die is coupled to the memory of the first die. The second die is an inference die that applies fixed weights for a trained model to an input data to generate an output. In one example, the second die is a training die that enables learning of the weights.

Abstract: Aspects of the subject disclosure may include, for example, a wireless framework for delivering TV services. The wireless framework can include a mix of wireless access technologies (e.g. Satellite, WiFi and/or LTE overlay links). One or more aspects of the subject disclosure include injecting TV content into the network at a few locations (e.g., residential locations) using satellite antennas (e.g., satellite dishes). The content is then further distributed to other homes using a house-to-house WiFi network and/or via an overlay LTE network. Other embodiments are disclosed.

Abstract: The disclosure provides a system for production of reactive intermediates from lignocellulosic biomass. The reactive intermediates can be used as platform chemicals for biological conversions or can be further catalytically upgraded to be used as “drop in” reagents for fuels. The disclosure provides methods and compositions useful for processing biomass to biofuels and intermediates.

Abstract: Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material (perovskite, improper ferroelectric, or hexagonal ferroelectric) and conductive oxides as electrodes. In various embodiments, one layer of the conductive oxide electrode wraps around the pillar capacitor, and forms the outer electrode of the pillar capacitor. The core of the pillar capacitor can take various forms.

Abstract: Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material (perovskite, improper ferroelectric, or hexagonal ferroelectric) and conductive oxides as electrodes. In various embodiments, one layer of the conductive oxide electrode wraps around the pillar capacitor, and forms the outer electrode of the pillar capacitor. The core of the pillar capacitor can take various forms.

Abstract: Described is a low power, high-density non-volatile differential memory bit-cell. The transistors of the differential memory bit-cell can be planar or non-planer and can be fabricated in the frontend or backend of a die. A bit-cell of the non-volatile differential memory bit-cell comprises first transistor first non-volatile structure that are controlled to store data of a first value. Another bit-cell of the non-volatile differential memory bit-cell comprises second transistor and second non-volatile structure that are controlled to store data of a second value, wherein the first value is an inverse of the second value. The first and second volatile structures comprise ferroelectric material (e.g., perovskite, hexagonal ferroelectric, improper ferroelectric).

Abstract: Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material (perovskite, improper ferroelectric, or hexagonal ferroelectric) and conductive oxides as electrodes. In various embodiments, one layer of the conductive oxide electrode wraps around the pillar capacitor, and forms the outer electrode of the pillar capacitor. The core of the pillar capacitor can take various forms.

Abstract: Described is a low power, high-density non-volatile differential memory bit-cell. The transistors of the differential memory bit-cell can be planar or non-planer and can be fabricated in the frontend or backend of a die. A bit-cell of the non-volatile differential memory bit-cell comprises first transistor first non-volatile structure that are controlled to store data of a first value. Another bit-cell of the non-volatile differential memory bit-cell comprises second transistor and second non-volatile structure that are controlled to store data of a second value, wherein the first value is an inverse of the second value. The first and second volatile structures comprise ferroelectric material (e.g., perovskite, hexagonal ferroelectric, improper ferroelectric).

Abstract: Systems, methods, apparatuses, and computer program products for packet latency reduction in mobile radio access networks. One method may include, when a buffer of a first sublayer of a wireless access link is empty and there is a new data unit in the first sublayer or when the first sublayer buffer is not empty and a data unit leaves a second sublayer buffer, comparing the number of data units currently stored in the second sublayer buffer with a queue length threshold that defines a total amount of space in the second sublayer buffer. When the number of data units currently stored in the second sublayer buffer is less than the queue length threshold, the method may also include transferring the data unit from the first sublayer to the second sublayer.

Abstract: Representative embodiments disclose mechanisms to validate statements made as part of a document creation or editing process. As the user edits or creates a document using a document creation/editing application, statements made in the document can be submitted to a validation service in a proactive or reactive manner. The statement validation service receives the statement, resolves any coreferences using a coreference resolution process. Once coreferences in the statement have been resolved and replaced, entities are resolved using an entity resolution process. Predicates are then resolved using a predicate resolution process. Entity-predicate pairs are then used to traverse a knowledge graph to extract information relevant to the statement. Suggested corrections are created from the extracted information and presented to the user via the document creation/editing application.

Abstract: Embodiments provide a method for performing a payment transaction at a merchant facility. The method includes receiving a connectivity request from an electronic payment card associated with a cardholder at a merchant networking device associated with a merchant. The method includes facilitating pairing of the electronic payment card with the merchant networking device. The method also includes upon pairing, pushing payment related information of the merchant to the electronic payment card. The method further includes receiving a payment transaction request for a payment transaction from the electronic payment card at the merchant networking device. The payment transaction request includes at least a payment card information of the electronic payment card of the cardholder and a transaction amount to be paid to an acquirer account from an issuer account of the cardholder. The method includes facilitating processing of the payment transaction based on the payment transaction request.

Abstract: A method to secure an adjacent pair of turf members to a ground surface is provided. The method includes disposing a joint strip on the ground surface, disposing a first turf member on the joint strip, inserting a first set of primary fasteners through the first turf member, joint strip and ground surface, inserting a first set of secondary fasteners through the first turf member, joint strip and ground surface, disposing a second turf member on the joint strip to permit a side edge of the second turf member to align with the side edge of the first turf member along a seam line, inserting a second set of primary fasteners through the second turf member, joint strip and ground surface, and inserting a second set of secondary fasteners through the second turf member, joint strip and ground surface.

Abstract: Isobutylene copolymer includes repeat units derived from isobutylene and one or more comonomers selected from isoprene, butadiene, cyclopentadiene, dicyclopentadiene, limonene, substituted styrenes, and C4 to C10 dienes other than isoprene, butadiene, limonene, cyclopentadiene, or dicyclopentadiene, wherein the molar ratio of isobutylene derived repeat units to the comonomer derived repeat units is from 75:1 to 1.5:1. The copolymers have a molecular weight, Mn, of from 200 to 20,000 Daltons and typically have a high double bond content and a high vinylidene double bond content when diene monomers are utilized.

Abstract: A computing device and method for managing an account. A computer displays a historical timeline and an event placement timeline. Past events are shown along the historical timeline, and future events along the event placement timeline. The computer suggest a change to the timing of one of the events. The user moves a movable object to the proposed timing to reschedule the event. The settings of the account are modified to automatically execute that event at the new timing.