Patents by Inventor Rajinder S. Rai

Rajinder S. Rai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8592299
    Abstract: A structure for minimizing resistance between a semi-insulating x-ray detector crystal and an electrically conducting substrate. Electrical contact pads are disposed on the detector crystal and on the substrate with an electrical interconnect between the contact pads formed from a conductive adhesive and washed solder in electrical and mechanical communication with the pads.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: November 26, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Voya R. Markovich, Rabindra N. Das, Rajinder S. Rai, Michael Vincent
  • Patent number: 8240031
    Abstract: A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: August 14, 2012
    Assignee: Endicott International Technologies, Inc.
    Inventors: Voya R. Markovich, Ronald V. Smith, How T. Lin, Frank D. Egitto, Rabindra N. Das, William E. Wilson, Rajinder S. Rai
  • Publication number: 20120015532
    Abstract: A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 19, 2012
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Voya R. Markovich, Ronald V. Smith, How T. Lin, Frank D. Egitto, Rabindra N. Das, William E. Wilson, Rajinder S. Rai
  • Publication number: 20090241332
    Abstract: A circuitized substrate and method of making same in which a first plurality of holes are formed within two bonded dielectric layers and then made conductive, e.g., plated. The substrate also includes third and fourth dielectric layers bonded to the first and second with a plurality of continuous electrically conductive thru holes extending through all four dielectric layers. Conductive paste is positioned within the thru holes for providing electrical connections between desired conductive layers of the substrate and outer layers as well. A circuitized substrate assembly and method of making same are also provided.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Inventors: John M. Lauffer, Roy H. Magnuson, Voya R. Markovich, James P. Paoletti, Kostas I. Papathomas, Rajinder S. Rai
  • Patent number: 7328506
    Abstract: A method for forming a plated microvia interconnect. An external dielectric layer (EDL) is mounted on a surface of the substrate and is in direct mechanical contact with a conductive element included in the surface. An opening formed in the EDL exposes the conductive element and creates a microvia in the EDL. A sidewall and bottom wall surface of the microvia is treated to promote copper adhesion to the sidewall and bottom wall surfaces. The sidewall and bottom wall surfaces are plated to form a layer of copper thereon. The layer of copper is in direct mechanical and electrical contact with the conductive element. A wet solder paste deposited on the layer of copper overfills a remaining portion of the microvia. The solder paste is reflowed to form a solder bump in and over the remaining portion of the microvia to form the plated microvia interconnect.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: February 12, 2008
    Assignee: International Business Machines Corporation
    Inventors: Miguel A. Jimarez, Ross W. Keesler, Voya R. Markovich, Rajinder S. Rai, Cheryl L. Tytran-Palomaki
  • Patent number: 6607613
    Abstract: A metal alloy solder ball comprising a first metal and a second metal, the first metal having a sputtering yield greater than the second metal. The solder ball comprises a bulk portion having a bulk ratio of the first metal to the second metal, an outer surface, and a surface gradient having a depth and a gradient ratio of the first metal to the second metal that is less than the bulk ratio. The gradient ratio increases along the surface gradient depth from a minimum at the outer surface. The solder ball may be formed by the process of exposing the ball to energized ions of a sputtering gas for an effective amount of time to form the surface gradient.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: August 19, 2003
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Egitto, Edmond O. Fey, Luis J. Matienzo, David L. Questad, Rajinder S. Rai, Daniel C. Van Hart
  • Publication number: 20030102158
    Abstract: A chip carrier structure and method for forming the same having a receptor pad formed therein. The structure comprises a circuitized substrate having a conductive element on the surface, an External Dielectric Layer mounted on the circuitized substrate with an opening positioned above the conductive element to form a microvia. The walls of the microvia are first treated to enhance copper adhesion and then are electroplated to provide a receptor pad. Finally, a solder paste is deposited within the microvia to create a solder deposit or bump.
    Type: Application
    Filed: October 25, 2002
    Publication date: June 5, 2003
    Inventors: Miguel A. Jimarez, Ross W. Keesler, Voya R. Markovich, Rajinder S. Rai, Cheryl L. Tytran-Palomaki
  • Patent number: 6492600
    Abstract: A chip carrier structure and method for forming the same having a receptor pad formed therein. The structure comprises a circuitized substrate having a conductive element on the surface, an External Dielectric Layer mounted on the circuitized substrate with an opening positioned above the conductive element to form a microvia. The walls of the microvia are first treated to enhance copper adhesion and then are electroplated to provide a receptor pad. Finally, a solder paste is deposited within the microvia to create a solder deposit or bump.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: December 10, 2002
    Assignee: International Business Machines Corporation
    Inventors: Miguel A. Jimarez, Ross W. Keesler, Voya R. Markovich, Rajinder S. Rai, Cheryl L. Tytran-Palomaki
  • Publication number: 20010012570
    Abstract: A metal alloy solder ball comprising a first metal and a second metal, the first metal having a sputtering yield greater than the second metal. The solder ball comprises a bulk portion having a bulk ratio of the first metal to the second metal, an outer surface, and a surface gradient having a depth and a gradient ratio of the first metal to the second metal that is less than the bulk ratio. The gradient ratio increases along the surface gradient depth from a minimum at the outer surface. The solder ball may be formed by the process of exposing the ball to energized ions of a sputtering gas for an effective amount of time to form the surface gradient.
    Type: Application
    Filed: February 1, 2001
    Publication date: August 9, 2001
    Inventors: Frank D. Egitto, Edmond O. Fey, Luis J. Matienzo, David L. Questad, Rajinder S. Rai, Daniel C. Van Hart
  • Patent number: 6210547
    Abstract: A process for altering surface properties of a mass of metal alloy solder comprising a first metal and a second metal. The process comprises exposing the mass to energized ions to preferentially sputter atoms of the first metal to form a surface layer ratio of first metal to second metal atoms that is less than the bulk ratio. The solder may be located on the surface of a substrate, wherein the process may further comprise masking the substrate to shield all but a selected area from the ion beam. The sputtering gas may comprises a reactive gas such as oxygen and the substrate may be an organic substrate. The process may further comprise simultaneously exposing the organic substrate to energized ions of the reactive gas to roughen the organic substrate surface.
    Type: Grant
    Filed: August 24, 1999
    Date of Patent: April 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Egitto, Edmond O. Fey, Luis J. Matienzo, David L. Questad, Rajinder S. Rai, Daniel C. Van Hart
  • Patent number: 6056831
    Abstract: A process for altering surface properties of a mass of metal alloy solder comprising a first metal and a second metal. The process comprises exposing the mass to energized ions to preferentially sputter atoms of the first metal to form a surface layer ratio of first metal to second metal atoms that is less than the bulk ratio. The solder may be located on the surface of a substrate, wherein the process may further comprise masking the substrate to shield all but a selected area from the ion beam. The sputtering gas may comprises a reactive gas such as oxygen and the substrate may be an organic substrate. The process may further comprise simultaneously exposing the organic substrate to energized ions of the reactive gas to roughen the organic substrate surface.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: May 2, 2000
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Egitto, Edmond O. Fey, Luis J. Matienzo, David L. Questad, Rajinder S. Rai, Daniel C. Van Hart