Patents by Inventor Rakesh Kumar Kinger

Rakesh Kumar Kinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10481202
    Abstract: A self-test controller includes a memory configured to store a test patterns, configuration registers, and a memory data component. The test patterns are encoded in the memory using various techniques in order to save storage space. By using the configuration parameters, the memory data component is configured to decode the test patterns and perform multiple built-in self-test on a multitude of test cores. The described techniques allow for built-in self-test to be performed dynamically while utilizing less space in the memory.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: November 19, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Arvind Jain, Nishi Bhushan Singh, Rahul Gulati, Pranjal Bhuyan, Rakesh Kumar Kinger, Roberto Averbuj
  • Publication number: 20180231609
    Abstract: A self-test controller includes a memory configured to store a test patterns, configuration registers, and a memory data component. The test patterns are encoded in the memory using various techniques in order to save storage space. By using the configuration parameters, the memory data component is configured to decode the test patterns and perform multiple built-in self-test on a multitude of test cores. The described techniques allow for built-in self-test to be performed dynamically while utilizing less space in the memory.
    Type: Application
    Filed: December 7, 2017
    Publication date: August 16, 2018
    Inventors: Arvind JAIN, Nishi BHUSHAN SINGH, Rahul GULATI, Pranjal BHUYAN, Rakesh Kumar KINGER, Roberto AVERBUJ
  • Publication number: 20150074474
    Abstract: A device for repairing a memory device may include spare memory blocks that may replace corresponding memory blocks that include at least one non-operational memory cell. One or more registers may be coupled in a chain to store memory repair information. A memory repair module may identify, upon a power-up test of the memory device, non-operational memory cells, which are incremental to previously identified defective memory cells in previous power-up tests, and may provide corresponding memory repair information of the identified non-operational memory cells. A logic circuit may block access to one or more registers and may facilitate storing, in one or more unblocked registers, the corresponding memory repair information of the identified one or more non-operational memory cells. The memory repair module may swap a memory block including the identified non-operational memory cells with a spare memory block based on content of the one or more unblocked registers.
    Type: Application
    Filed: September 27, 2013
    Publication date: March 12, 2015
    Applicant: BROADCOM CORPORATION
    Inventors: Mohammad Issa, Rakesh Kumar Kinger