Patents by Inventor Rami HOURANI

Rami HOURANI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12208637
    Abstract: Embodiments of the present disclosure generally relate to optical devices. More specifically, embodiments described herein relate to optical devices and methods of manufacturing a patterned optical device film on an optical device substrate. According to certain embodiments, an inkjet deposition process is used to deposit a patterned inkjet coating layer on the optical device substrate. A deposition process may then be used to deposit an optical device material on the patterned inkjet coating and the optical device substrate. The patterned inkjet coating on the optical device substrate may then be washed with an appropriate detergent to lift-off the patterned inkjet coating layer from the optical device substrate to form the patterned optical device film.
    Type: Grant
    Filed: February 10, 2023
    Date of Patent: January 28, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Yingdong Luo, Jinyu Lu, Takashi Kuratomi, Alexia Adilene Portillo Rivera, Xiaopei Deng, Zhengping Yao, Daihua Zhang, Rami Hourani, Ludovic Godet
  • Patent number: 12121925
    Abstract: An optical device coating assembly is provided. The optical device coating assembly includes a substrate support operable to retain an optical device substrate. The coating assembly further includes a first actuator connected to the substrate support. The first actuator is configured to rotate the substrate support. The coating assembly includes a holder configured to hold a coating applicator against an edge of the optical device substrate when the optical device substrate is rotated on the substrate support and a second actuator operable to apply a force on the holder in a direction towards the substrate support. The second actuator is a constant force actuator.
    Type: Grant
    Filed: November 10, 2023
    Date of Patent: October 22, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kangkang Wang, Yaseer Arafath Ahamed, Yige Gao, Benjamin B. Riordon, Rami Hourani, James D. Strassner, Ludovic Godet, Thinh Nguyen
  • Patent number: 12109641
    Abstract: The present disclosure generally relates to a method and apparatus for forming a substrate having a graduated refractive index. A method of forming a waveguide structure includes expelling plasma from an applicator having a head toward a plurality of grating structures formed on a substrate. The plasma is formed in the head at atmospheric pressure. The method further includes changing a depth of the plurality of grating structures with the plasma by removing grating material from the plurality of grating structures.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: October 8, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kang Luo, Ludovic Godet, Daihua Zhang, Nai-Wen Pi, Jinrui Guo, Rami Hourani
  • Patent number: 12110582
    Abstract: A method of forming an optical device is provided. The method includes disposing an optical device substrate on a substrate support in a process volume of a process chamber, the optical device substrate having a first surface; and forming a first optical layer on the first surface of the optical device substrate during a first time period when the optical device substrate is on the substrate support, wherein the first optical layer comprises one or more metals in a metal-containing oxide, a metal-containing nitride, or a metal-containing oxynitride, and the first optical layer is formed without an RF-generated plasma over the optical device substrate; and forming a second optical layer with an RF-generated plasma over the first optical layer during a second time period when the optical device substrate is on the substrate support.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: October 8, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kenichi Ohno, Takashi Kuratomi, Fariah Hayee, Andrew Ceballos, Rami Hourani, Ludovic Godet
  • Publication number: 20240319588
    Abstract: Embodiments of the present disclosure generally relate to imprint compositions and materials and related processes useful for nanoimprint lithography (NIL). In one or more embodiments, a method for preparing an imprinted surface is provided and includes disposing an imprint composition on a substrate, contacting the imprint composition with a stamp having a pattern, converting the imprint composition to an imprint material having the pattern, and removing the stamp from the imprint material. The imprint composition may contain one or more types of nanoparticles, one or more surface ligands, one or more solvents, one or more additives, and one or more acrylates.
    Type: Application
    Filed: May 30, 2024
    Publication date: September 26, 2024
    Inventors: Amita JOSHI, Ian Matthew MCMACKIN, Rami HOURANI, Yingdong LUO, Sivapackia GANAPATHIAPPAN, Ludovic GODET
  • Patent number: 12087836
    Abstract: Contact over active gate structures with metal oxide cap structures are described. In an example, an integrated circuit structure includes a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures, each of the conductive trench contact structures including a metal oxide cap structure thereon. An interlayer dielectric material is over the plurality of gate structures and over the plurality of conductive trench contact structures. An opening is in the interlayer dielectric material and in a gate insulating layer of a corresponding one of the plurality of gate structures. A conductive via is in the opening, the conductive via in direct contact with the corresponding one of the plurality of gate structures, and the conductive via on a portion of one or more of the metal oxide cap structures.
    Type: Grant
    Filed: October 20, 2023
    Date of Patent: September 10, 2024
    Assignee: Intel Corporation
    Inventors: Rami Hourani, Richard Vreeland, Giselle Elbaz, Manish Chandhok, Richard E. Schenker, Gurpreet Singh, Florian Gstrein, Nafees Kabir, Tristan A. Tronic, Eungnak Han
  • Publication number: 20240295693
    Abstract: Embodiments of the present disclosure generally relate to methods for forming a waveguide. Methods may include measuring a waveguide substrate, the waveguide having a substrate thickness distribution; and depositing an index-matched layer onto a surface of the waveguide, the index-matched layer having a first surface disposed on the waveguide substrate and a second surface opposing the first surface, wherein the index-matched layer is disposed only over a portion of the waveguide substrate, and a device slope of a second surface of the index-matched layer is substantially the same as the waveguide slope of the first surface of the waveguide.
    Type: Application
    Filed: April 8, 2024
    Publication date: September 5, 2024
    Inventors: Yingdong LUO, Zhengping YAO, Daihua ZHANG, David Alexander SELL, Jingyi YANG, Xiaopei DENG, Kevin MESSER, Samarth BHARGAVA, Rami HOURANI, Ludovic GODET
  • Patent number: 12077860
    Abstract: Embodiments of the present disclosure generally relate to methods and materials for optical device fabrication. More specifically, embodiments described herein provide for optical film deposition methods and materials to expand the process window for amorphous optical film deposition via incorporation of dopant atoms by suppressing the crystal growth of optical materials during deposition. By enabling amorphous films to be deposited at higher temperatures, significant cost savings and increased throughput are possible.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: September 3, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Andrew Ceballos, Ludovic Godet, Karl J. Armstrong, Rami Hourani
  • Patent number: 12080639
    Abstract: Contact over active gate structure with metal oxide layers are described are described. In an example, an integrated circuit structure includes a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures. A portion of one of the plurality of trench contact structures has a metal oxide layer thereon. An interlayer dielectric material is over the plurality of gate structures and over the plurality of conductive trench contact structures. An opening is in the interlayer dielectric material and in a gate insulating layer of a corresponding one of the plurality of gate structures. A conductive via is in the opening, the conductive via in direct contact with the corresponding one of the plurality of gate structures, and the conductive via on the metal oxide layer.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: September 3, 2024
    Assignee: Intel Corporation
    Inventors: Rami Hourani, Manish Chandhok, Richard E. Schenker, Florian Gstrein, Leonard P. Guler, Charles H. Wallace, Paul A. Nyhus, Curtis Ward, Mohit K. Haran, Reken Patel
  • Publication number: 20240270633
    Abstract: Embodiments of the present disclosure generally relate to encapsulated optical devices and methods for fabricating the encapsulated optical devices. In one or more embodiments, a method for encapsulating an optical device includes depositing a metallic silver layer on a substrate, depositing a barrier layer on the metallic silver layer, where the barrier layer contains silicon nitride, a metallic element, a metal nitride, or any combination thereof, and depositing an encapsulation layer containing silicon oxide on the barrier layer.
    Type: Application
    Filed: April 5, 2024
    Publication date: August 15, 2024
    Inventors: Alexia Adilene PORTILLO RIVERA, Andrew CEBALLOS, Kenichi OHNO, Rami HOURANI, Karl J. ARMSTRONG, Brian Alexander COHEN
  • Publication number: 20240270007
    Abstract: Embodiments of the present disclosure generally relate to optical devices. More specifically, embodiments described herein relate to optical devices and methods of manufacturing a patterned optical device film on an optical device substrate. According to certain embodiments, an inkjet deposition process is used to deposit a patterned inkjet coating layer on the optical device substrate. A deposition process may then be used to deposit an optical device material on the patterned inkjet coating and the optical device substrate. The patterned inkjet coating on the optical device substrate may then be washed with an appropriate detergent to lift-off the patterned inkjet coating layer from the optical device substrate to form the patterned optical device film.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 15, 2024
    Inventors: Yingdong LUO, Jinyu LU, Takashi KURATOMI, Alexia Adilene PORTILLO RIVERA, Xiaopei DENG, Zhengping YAO, Daihua ZHANG, Rami HOURANI, Ludovic GODET
  • Patent number: 12044963
    Abstract: Embodiments of the present disclosure generally relate to imprint compositions and materials and related processes useful for nanoimprint lithography (NIL). In one or more embodiments, an imprint composition contains one or more types of nanoparticles, one or more surface ligands, one or more solvents, one or more additives, and one or more acrylates.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: July 23, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Amita Joshi, Ian Matthew McMackin, Rami Hourani, Yingdong Luo, Sivapackia Ganapathiappan, Ludovic Godet
  • Patent number: 12036578
    Abstract: Embodiments herein describe techniques for a semiconductor device including an interconnect structure. The interconnect structure may have a segment of a passivant layer including a SAM. The SAM may include head groups, and chains attached to the head groups. The chains include functional groups that are cross-linkable at end or side of the chains to result in chain extension by reacting with another SAM or polymer, densification by crosslinking with an adjacent SAM, or polymerization having an initiator as the SAM or the SAM attached to another SAM. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: July 16, 2024
    Assignee: Intel Corporation
    Inventors: Florian Gstrein, James M. Blackwell, Eungnak Han, Rami Hourani, Tayseer Mahdi
  • Patent number: 11990403
    Abstract: Dielectric helmet-based approaches for back end of line (BEOL) interconnect fabrication, and the resulting structures, are described. In an example, a semiconductor structure includes a substrate. A plurality of alternating first and second conductive line types is disposed along a same direction of a back end of line (BEOL) metallization layer disposed in an inter-layer dielectric (ILD) layer disposed above the substrate. A dielectric layer is disposed on an uppermost surface of the first conductive line types but not along sidewalls of the first conductive line types, and is disposed along sidewalls of the second conductive line types but not on an uppermost surface of the second conductive line types.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: May 21, 2024
    Assignee: Intel Corporation
    Inventors: Kevin L. Lin, Richard E. Schenker, Jeffery D. Bielefeld, Rami Hourani, Manish Chandhok
  • Publication number: 20240160099
    Abstract: Embodiments of the present disclosure generally relate to densified nanoimprint films and processes for making these densified nanoimprint films, as well as optical devices containing the densified nanoimprint films. In one or more embodiments, a densified nanoimprint film contains a base nanoimprint film and a metal oxide disposed on the base nanoimprint film and in between the nanoparticles. The base nanoimprint film contains nanoparticles, where the nanoparticles contain titanium oxide, zirconium oxide, niobium oxide, tantalum oxide, hafnium oxide, chromium oxide, indium tin oxide, silicon nitride, or any combination thereof. The metal oxide contains aluminum oxide, titanium oxide, zirconium oxide, niobium oxide, tantalum oxide, indium oxide, indium tin oxide, hafnium oxide, chromium oxide, scandium oxide, tin oxide, zinc oxide, yttrium oxide, praseodymium oxide, magnesium oxide, silicon oxide, silicon nitride, silicon oxynitride, or any combination thereof.
    Type: Application
    Filed: December 22, 2023
    Publication date: May 16, 2024
    Inventors: Andrew CEBALLOS, Rami HOURANI, Kenichi OHNO, Yuriy MELNIK, Amita JOSHI
  • Patent number: 11976351
    Abstract: An optical device is provided. The optical device includes an optical device substrate having a first surface; and an optical device film disposed over the first surface of the optical device substrate. The optical device film is formed of titanium oxide. The titanium oxide is selected from the group of titanium(IV) oxide (TiO2), titanium monoxide (TiO), dititanium trioxide (Ti2O3), Ti3O, Ti2O, ?-TiOx, where x is 0.68 to 0.75, and TinO2n-1, where n is 3 to 9, the optical device film has a refractive index greater than 2.72 at a 520 nanometer (nm) wavelength, and a rutile phase of the titanium oxide comprises greater than 94 percent of the optical device film.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: May 7, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Kenichi Ohno, Andrew Ceballos, Karl J. Armstrong, Takashi Kuratomi, Rami Hourani, Ludovic Godet
  • Patent number: 11976002
    Abstract: Embodiments of the present disclosure generally relate to encapsulated optical devices and methods for fabricating the encapsulated optical devices. In one or more embodiments, a method for encapsulating an optical device includes depositing a metallic silver layer on a substrate, depositing a barrier layer on the metallic silver layer, where the barrier layer contains silicon nitride, a metallic element, a metal nitride, or any combination thereof, and depositing an encapsulation layer containing silicon oxide on the barrier layer.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: May 7, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Alexia Adilene Portillo Rivera, Andrew Ceballos, Kenichi Ohno, Rami Hourani, Karl J. Armstrong, Brian Alexander Cohen
  • Publication number: 20240126012
    Abstract: Embodiments of the present disclosure generally relate to methods for forming a waveguide. Methods may include measuring a waveguide substrate, the waveguide having a substrate thickness distribution; and depositing an index-matched layer onto a surface of the waveguide, the index-matched layer having a first surface disposed on the waveguide substrate and a second surface opposing the first surface, wherein the index-matched layer is disposed only over a portion of the waveguide substrate, and a device slope of a second surface of the index-matched layer is substantially the same as the waveguide slope of the first surface of the waveguide.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 18, 2024
    Inventors: Yingdong LUO, Zhengping YAO, Daihua ZHANG, David Alexander SELL, Jingyi YANG, Xiaopei DENG, Kevin MESSER, Samarth BHARGAVA, Rami HOURANI, Ludovic GODET
  • Patent number: 11955377
    Abstract: Approaches based on differential hardmasks for modulation of electrobucket sensitivity for semiconductor structure fabrication, and the resulting structures, are described. In an example, a method of fabricating an interconnect structure for an integrated circuit includes forming a hardmask layer above an inter-layer dielectric (ILD) layer formed above a substrate. A plurality of dielectric spacers is formed on the hardmask layer. The hardmask layer is patterned to form a plurality of first hardmask portions. A plurality of second hardmask portions is formed alternating with the first hardmask portions. A plurality of electrobuckets is formed on the alternating first and second hardmask portions and in openings between the plurality of dielectric spacers. Select ones of the plurality of electrobuckets are exposed to a lithographic exposure and removed to define a set of via locations.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Kevin L. Lin, Robert L Bristol, James M. Blackwell, Rami Hourani, Marie Krysak
  • Patent number: 11953826
    Abstract: Lined photoresist structures to facilitate fabricating back end of line (BEOL) interconnects are described. In an embodiment, a hard mask has recesses formed therein, wherein liner structures are variously disposed each on a sidewall of a respective recess. Photobuckets comprising photoresist material are also variously disposed in the recesses. The liner structures variously serve as marginal buffers to mitigate possible effects of misalignment in the exposure of photoresist material to photons or an electron beam. In another embodiment, a recess has disposed therein a liner structure and a photobucket that are both formed by self-assembly of a photoresist-based block-copolymer.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: James M. Blackwell, Robert L. Bristol, Marie Krysak, Florian Gstrein, Eungnak Han, Kevin L. Lin, Rami Hourani, Shane M. Harlson