Abstract: An improved circuit board assembly includes a cover or other member disposed adjacent to the substrate and, for example, spaced therefrom so as to define a plenum. Self-aligning heat sinks (or other heat dissipative elements) are spring-mounted (or otherwise resiliently mounted) to the cover and, thereby, placed in thermal contact with one or more of the circuit components. Flow-diverting elements are provided, e.g., so that the overall impedance of the board substantially matches that of one or more of the other circuit boards in a common chassis. The circuit board cover can be adapted to provide thermal and/or electromagnetic emission control, as well as shock and vibration. A connector arrangement provides electrical, mechanical and/or other operational coupling between the circuit board and a chassis regardless of whether the board is disposed in a slot on a first (e.g., upper) side of a source of cooling air for the chassis or on a second (e.g, lower) opposite side of that source.

Abstract: An improved circuit board assembly includes a cover or other member disposed adjacent to the substrate and, for example, spaced therefrom so as to define a plenum. Self-aligning heat sinks (or other heat dissipative elements) are spring-mounted (or otherwise resiliently mounted) to the cover and, thereby, placed in thermal contact with one or more of the circuit components. Flow-diverting elements are provided, e.g., so that the overall impedance of the board substantially matches that of one or more of the other circuit boards in a common chassis. The circuit board cover can be adapted to provide thermal and/or electromagnetic emission control, as well as shock and vibration. A connector arrangement provides electrical, mechanical and/or other operational coupling between the circuit board and a chassis regardless of whether the board is disposed in a slot on a first (e.g., upper) side of a source of cooling air for the chassis or on a second (e.g., lower) opposite side of that source.

Abstract: An improved circuit board assembly includes a cover or other member disposed adjacent to the substrate and, for example, spaced therefrom so as to define a plenum. Self-aligning heat sinks (or other heat dissipative elements) are spring-mounted (or otherwise resiliently mounted) to the cover and, thereby, placed in thermal contact with one or more of the circuit components. Flow-diverting elements are provided, e.g., so that the overall impedance of the board substantially matches that of one or more of the other circuit boards in a common chassis. The circuit board cover can be adapted to provide thermal and/or electromagnetic emission control, as well as shock and vibration. A connector arrangement provides electrical, mechanical and/or other operational coupling between the circuit board and a chassis regardless of whether the board is disposed in a slot on a first (e.g., upper) side of a source of cooling air for the chassis or on a second (e.g., lower) opposite side of that source.

Abstract: An improved circuit board assembly includes a cover or other member disposed adjacent to the substrate and, for example, spaced therefrom so as to define a plenum. Self-aligning heat sinks (or other heat dissipative elements) are spring-mounted (or otherwise resiliently mounted) to the cover and, thereby, placed in thermal contact with one or more of the circuit components. Flow-diverting elements are provided, e.g., so that the overall impedance of the board substantially matches that of one or more of the other circuit boards in a common chassis. The circuit board cover can be adapted to provide thermal and/or electromagnetic emission control, as well as shock and vibration. A connector arrangement provides electrical, mechanical and/or other operational coupling between the circuit board and a chassis regardless of whether the board is disposed in a slot on a first (e.g., upper) side of a source of cooling air for the chassis or on a second (e.g., lower) opposite side of that source.

Abstract: An improved circuit board assembly includes a cover or other member disposed adjacent to the substrate and, for example, spaced therefrom so as to define a plenum. Self-aligning heat sinks (or other heat dissipative elements) are spring-mounted (or otherwise resiliently mounted) to the cover and, thereby, placed in thermal contact with one or more of the circuit components. Flow-diverting elements are provided, e.g., so that the overall impedance of the board substantially matches that of one or more of the other circuit boards in a common chassis. The circuit board cover can be adapted to provide thermal and/or electromagnetic emission control, as well as shock and vibration. A connector arrangement provides electrical, mechanical and/or other operational coupling between the circuit board and a chassis regardless of whether the board is disposed in a slot on a first (e.g., upper) side of a source of cooling air for the chassis or on a second (e.g., lower) opposite side of that source.

Abstract: An improved circuit board assembly includes a cover or other member disposed adjacent to the substrate and, for example, spaced therefrom so as to define a plenum. Self-aligning heat sinks (or other heat dissipative elements) are spring-mounted (or otherwise resiliently mounted) to the cover and, thereby, placed in thermal contact with one or more of the circuit components. Flow-diverting elements are provided, e.g., so that the overall impedance of the board substantially matches that of one or more of the other circuit boards in a common chassis. The circuit board cover can be adapted to provide thermal and/or electromagnetic emission control, as well as shock and vibration.

Abstract: An improved circuit board assembly includes a cover or other member disposed adjacent to the substrate and, for example, spaced therefrom so as to define a plenum. Self-aligning heat sinks (or other heat dissipative elements) are spring-mounted (or otherwise resiliently mounted) to the cover and, thereby, placed in thermal contact with one or more of the circuit components. Flow-diverting elements are provided, e.g., so that the overall impedance of the board substantially matches that of one or more of the other circuit boards in a common chassis. The circuit board cover can be adapted to provide thermal and/or electromagnetic emission control, as well as shock and vibration. A connector arrangement provides electrical, mechanical and/or other operational coupling between the circuit board and a chassis regardless of whether the board is disposed in a slot on a first (e.g., upper) side of a source of cooling air for the chassis or on a second (e.g., lower) opposite side of that source.

Abstract: A computer system in a fault-tolerant configuration employees multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. The system detects faults in the CPUs and memory modules, and places a faulty unit offline while continuing to operate using the good units. The faulty unit can be replaced and reintegrated into the system without shutdown. The multiple CPUs are loosely synchronized, as by detecting events such as memory references and stalling any CPU ahead of others until all execute the function simultaneously; interrupts can be synchronized by ensuring that all CPUs implement the interrupt at the same point in their instruction stream. Memory references via the separate CPU-to-memory busses are voted at the three separate ports of each of the memory modules. I/O functions are implemented using two identical I/O busses, each of which is separately coupled to only one of the memory modules.

Abstract: A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. The system detects faults in the CPUs and memory modules, and places a faulty unit offline while continuing to operate using the good units. The faulty unit can be replaced and reintegrated into the system without shutdown. The multiple CPUs are loosely synchronized, as by detecting events such as memory references and stalling any CPU ahead of others until all execute the function simultaneously; interrupts can be synchronized by ensuring that all CPUs implement the interrupt at the same point in their instruction stream. Memory references via the separate CPU-to-memory busses are voted at the three separate ports of each of the memory modules. I/O functions are implemented using two identical I/O busses, each of which is separately coupled to only one of the memory modules.

Abstract: A multiprocessor system includes a number of sub-processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. The CPUs are structured to operate in one of two modes: a simplex mode in which the two CPUs operate independently of each other, and a duplex mode in which the CPUs operate in lock-step synchronism to execute each instruction of identical instruction streams at substantially the same time. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets. CPUs and I/O devices may write to, or read from, memory of a CPU of the system.

Abstract: A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. The multiple CPUs are loosely synchronized, as by detecting events such as memory references and stalling any CPU ahead of others until all execute the function simultaneously; interrupts can be synchronized by ensuring that all CPUs implement the interrupt at the same point in their instruction stream. I/O devices are accessed through a pair of identical (redundant) I/O processors, but only one is designated to actively control a given device; in case of failure of one I/O processor, however, an I/O device can be accessed by the other one without system shutdown, i.e., by merely redesignating the addresses of the registers of the I/O device under instruction control.

Abstract: A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. The system detects faults in the CPUs and memory modules, and places a faulty unit offline while continuing to operate using the good units. The faulty unit can be replaced and reintegrated into the system without shutdown. The multiple CPUs are loosely synchronized, as by detecting events such as memory references and stalling any CPU ahead of others until all execute the function simultaneously; interrupts can be synchronized by ensuring that all CPUs implement the interrupt at the same point in their instruction stream. Memory references via the separate CPU-to-memory busses are voted at the three separate ports of each of the memory modules. I/O functions are implemented using two identical I/O busses, each of which is separately coupled to only one of the memory modules.

Abstract: A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. The multiple CPUs are loosely synchronized, as by detecting events such as memory references and stalling any CPU ahead of others until all execute the function simultaneously; interrupts can be synchronized by ensuring that all CPUs implement the interrupt at the same point in their instruction stream. I/O devices are accessed through a pair of identical (redundant) I/O processors, but only one is designated to actively control a given device; in case of failure of one I/O processor, however, an I/O device can be accessed by the other one without system shutdown, i.e., by merely redesignating the addresses of the registers of the I/O device under instruction control.

Abstract: A multi-stage time division switch interconnects processors communicating over one or more channels on time division lines. One of the processors is designated as a common processor to provide the switching "mapping" information for the various stages of the switch sending the switching information to the memory and logic of each switched stage over dedicated channels which include channels on the time division line emanating from the common processor and time division channels which pass through several switches until the memory of the applicable switch is accessed.