Patents by Inventor Rao Peddada

Rao Peddada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180190889
    Abstract: A method for manufacturing light emitting devices, comprising: providing a package body including: (i) a reflector cup defining a cavity and (ii) a plurality of metal pads disposed at a bottom surface of the cavity; performing reservoir stencil printing to deposit a respective solder pattern on each of the metal pads, the reservoir stencil printing being performed using a 3D electroform stencil that is placed over the reflector cup, the 3D electroform stencil including a lip configured to engage one or more sidewalls of the reflector cup, and a reservoir extending away from the lip and into the cavity; placing an LED die on the solder patterns that are formed on the metal pads and performing reflow soldering to attach the LED die to the metal pads.
    Type: Application
    Filed: December 21, 2017
    Publication date: July 5, 2018
    Applicant: Lumileds LLC
    Inventors: Sridevi A. VAKKALANKA, S. Rao PEDDADA
  • Patent number: 9773941
    Abstract: Embodiments of the invention are directed to a method of separating a wafer of light emitting devices. The light emitting devices are disposed in rows. The method includes dividing the wafer into a plurality of regions. Each region comprises a plurality of rows of light emitting devices and a first region is wider than a second region. For each region, the method includes determining a position of first and second dicing streets. The dicing streets are located between the rows of light emitting devices. The method includes determining, using the position of the first and second dicing streets, positions of a plurality of dicing streets disposed between the first and second dicing streets. The method includes cutting the wafer along streets.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: September 26, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Satyanarayana Rao Peddada, Frank Lili Wei
  • Publication number: 20160268472
    Abstract: Embodiments of the invention are directed to a method of separating a wafer of light emitting devices. The light emitting devices are disposed in rows. The method includes dividing the wafer into a plurality of regions. Each region comprises a plurality of rows of light emitting devices and a first region is wider than a second region. For each region, the method includes determining a position of first and second dicing streets. The dicing streets are located between the rows of light emitting devices. The method includes determining, using the position of the first and second dicing streets, positions of a plurality of dicing streets disposed between the first and second dicing streets. The method includes cutting the wafer along streets.
    Type: Application
    Filed: October 22, 2014
    Publication date: September 15, 2016
    Inventors: Satyanarayana Rao Peddada, Frank Lili Wei
  • Publication number: 20160268473
    Abstract: Embodiments of the invention include a method for separating a wafer including a growth substrate and a plurality of devices formed on the growth substrate and arranged in a plurality of rows separated by at least one street. The wafer includes a front side on which the plurality of devices are formed and a back side, which is a surface of the growth substrate. The method includes scribing a first scribe line aligned with the street on the front side, scribing a second scribe line aligned with the street on the back side, and scribing a third scribe line aligned with the street on the back side.
    Type: Application
    Filed: October 13, 2014
    Publication date: September 15, 2016
    Inventors: S. Rao Peddada, Frank Lili Wei, Enrico Casaje, Rajat Sharma
  • Publication number: 20160163934
    Abstract: Some embodiments include a III-nitride light emitting device with a light emitting layer disposed between an n-type region and a p-type region. A glass layer is connected to the III-nitride light emitting device. A wavelength converting layer is disposed between the III-nitride light emitting device and the glass layer. The glass layer is narrower than the III-nitride light emitting device.
    Type: Application
    Filed: July 7, 2014
    Publication date: June 9, 2016
    Inventors: Satyanarayana Rao Peddada, Frank L. Wei
  • Publication number: 20110048495
    Abstract: A method and apparatus for efficiently cooling a PV module for converting solar radiation to electrical energy comprises a means for defining a thermally conductive path characterized by a steep thermal gradient (delta T) provided interiorly, adjacent the back surface of the solar cells and having opposite ends extending exteriorly around at least a portion of a back facing exterior surface of the PV module. Heat developed from the solar cells is efficiently conducted away from the solar cells along the steep thermal gradient to the exterior shaded surface of the PV module where heat is quickly dissipated to the ambient surroundings. The invention applies to both polycrystalline and single crystalline, as well as to thin film PV modules.
    Type: Application
    Filed: March 10, 2010
    Publication date: March 3, 2011
    Inventor: Satyanarayana Rao Peddada
  • Publication number: 20110017293
    Abstract: An improved thin film PV module and simplified fabrication process are provided that achieve higher PV module efficiency, while eliminating expensive process steps, and reducing the capital cost of thin film processing equipment. A lamination material, characterized by high reflectivity as well as thermal conductivity and emissivity, is provided directly adjacent the active region of a thin film stack, eliminating the need for complex sputtering or deposition process steps ordinarily required for providing a reflective layer. The lamination material reflects unabsorbed light back into the thin film stack, thereby increasing photocurrent generation, and obviating the need for a reflective metallization layer. The lamination layer and back sheet for sealing the light-absorbing stack against the ingress of moisture also can be applied in a single process step.
    Type: Application
    Filed: August 31, 2009
    Publication date: January 27, 2011
    Inventors: James F. Farrell, Satyanarayana Rao Peddada
  • Publication number: 20110017265
    Abstract: A thermally conductive material is provided adjacent to or close to the active light-absorbing surface in silicon PV modules made with x-Si or p-Si cells or in thin film PV modules. The material is characterized by high thermal conduction and emissivity as well as high reflectance with respect to the solar spectrum. An exterior portion of the thermally conductive material is wrapped around the rearward facing, shaded surface of the PV module, thereby defining a thermal gradient for conduction of heat from the interior of the PV module to the cooler exterior, where heat is dissipated into the ambient surroundings. The thermally conductive, highly reflective material may be incorporated in or otherwise integrated with a lamination material used to adhere the back sheet to the front sheet of a thin film PV module.
    Type: Application
    Filed: August 26, 2009
    Publication date: January 27, 2011
    Inventors: James F. Farrell, Satyanarayana Rao Peddada
  • Publication number: 20110017266
    Abstract: An improved thin film PV module and simplified fabrication process are provided that achieve higher PV module efficiency, while eliminating expensive process steps, and reducing the capital cost of thin film processing equipment. A lamination material, characterized by high reflectivity as well as thermal conductivity and emissivity, is provided directly adjacent the active region of a thin film stack, eliminating the need for complex sputtering or deposition process steps ordinarily required for providing a reflective layer. The lamination material reflects unabsorbed light back into the thin film stack thereby increasing photocurrent generation, and obviating the need for a reflective metallization layer. The lamination layer and back sheet for sealing the light-absorbing stack against the ingress of moisture also can be applied in a single process step.
    Type: Application
    Filed: August 27, 2009
    Publication date: January 27, 2011
    Inventors: James F. Farrell, Batyanarayana Rao Peddada
  • Patent number: 7203390
    Abstract: An optical packaging arrangement combines a planar lightwave circuit (PLC) having an array of waveguides thereon, an array of photodetectors on a substrate to receive light beams coupled out of the PLC by the output ports, and a collimating faceplate, having a plurality of glass cores, extending between the PLC and the photodetector array for coupling the output light beams to respective photodetectors. The faceplate forms a cover for a hermetic cavity encompassing the photodetectors. The PLC is disposed either co-planarly with the faceplate or transversely to it. Light from the PLC is tapped via a plurality of taps formed on the PLC for coupling to the photodetectors.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: April 10, 2007
    Assignee: JDS Uniphase Corporation
    Inventors: Douglas E. Crafts, James F. Farrell, Mark B. Farrelly, Duane Cook, Satyanarayana Rao Peddada
  • Patent number: 7008120
    Abstract: An apparatus and packaging scheme that ensures that alignments between signal sending and detecting components in transceivers are optimized and maintained over the lifetime of the apparatus. This is accomplished through use of a pair of polymer optical modules, which are used to couple light sent to and received from respective fiber optic cables. During a pre-alignment process, head portions of the polymer optical modules are inserted into respective slots defined in a standoff that is mounted on an optical sub-assembly to which an emitter and detector are mounted, whereby these slots are configured so that the head portions slide along the sidewalls of the slots during assembly. During a subsequent active alignment process, each polymer optical module is positioned relative to its respective emitter or detector until a maximum signal is detected, whereupon the position of the components is quick-set using a UV-sensitive adhesive.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: March 7, 2006
    Assignee: Intel Corporation
    Inventors: Brett Zaborsky, Rao Peddada, Andrew Alduino, Douglas Crafts, Siegfried Fleischer
  • Patent number: 6945708
    Abstract: An optical packaging arrangement combines a planar lightwave circuit (PLC) having an array of waveguides thereon, an array of photodetectors on a substrate to receive light beams coupled out of the PLC by the output ports, and a collimating faceplate, having a plurality of glass cores, extending between the PLC and the photodetector array for coupling the output light beams to respective photodetectors. The faceplate forms a cover for a hermetic cavity encompassing the photodetectors. The PLC is disposed either co-planarly with the faceplate or transversely to it. Light from the PLC is tapped via a plurality of taps formed on the PLC for coupling to the photodetectors.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: September 20, 2005
    Assignee: JDS Uniphase Corporation
    Inventors: Douglas E. Crafts, James F. Farrell, Mark B. Farrelly, Duane Cook, Satyanarayana Rao Peddada
  • Publication number: 20040161186
    Abstract: An optical packaging arrangement combines a planar lightwave circuit (PLC) having an array of waveguides thereon, an array of photodetectors on a substrate to receive light beams coupled out of the PLC by the output ports, and a collimating faceplate, having a plurality of glass cores, extending between the PLC and the photodetector array for coupling the output light beams to respective photodetectors. The faceplate forms a cover for a hermetic cavity encompassing the photodetectors. The PLC is disposed either co-planarly with the faceplate or transversely to it. Light from the PLC is tapped via a plurality of taps formed on the PLC for coupling to the photodetectors.
    Type: Application
    Filed: February 18, 2003
    Publication date: August 19, 2004
    Applicant: JDS Uniphase Corporation, State of Incorporation: Delaware
    Inventors: Douglas E. Crafts, James F. Farrell, Mark B. Farrelly, Duane Cook, Satyanarayana Rao Peddada
  • Publication number: 20040033031
    Abstract: An apparatus and packaging scheme that ensures that alignments between signal sending and detecting components in transceivers are optimized and maintained over the lifetime of the apparatus. This is accomplished through use of a pair of polymer optical modules, which are used to couple light sent to and received from respective fiber optic cables. During a pre-alignment process, head portions of the polymer optical modules are inserted into respective slots defined in a standoff that is mounted on an optical sub-assembly to which an emitter and detector are mounted, whereby these slots are configured so that the head portions slide along the sidewalls of the slots during assembly. During a subsequent active alignment process, each polymer optical module is positioned relative to its respective emitter or detector until a maximum signal is detected, whereupon the position of the components is quick-set using a UV-sensitive adhesive. Additional adhesive may then be added to further secure the components.
    Type: Application
    Filed: August 8, 2003
    Publication date: February 19, 2004
    Inventors: Brett Zaborsky, Rao Peddada, Andrew Alduino, Douglas Crafts, Siegfried Fleischer
  • Patent number: 6692161
    Abstract: An apparatus and packaging scheme that ensures that alignments between signal sending and detecting components in transceivers are optimized and maintained over the lifetime of the apparatus. This is accomplished through use of a pair of polymer optical modules, which are used to couple light sent to and received from respective fiber optic cables. During a pre-alignment process, head portions of the polymer optical modules are inserted into respective slots defined in a standoff that is mounted on an optical sub-assembly to which an emitter and detector are mounted, whereby these slots are configured so that the head portions slide along the sidewalls of the slots during assembly. During a subsequent active alignment process, each polymer optical module is positioned relative to its respective emitter or detector until a maximum signal is detected, whereupon the position of the components is quick-set using a UV-sensitive adhesive. Additional adhesive may then be added to further secure the components.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: February 17, 2004
    Assignee: Intel Corporation
    Inventors: Brett Zaborsky, Rao Peddada, Andrew Alduino, Douglas Crafts, Siegfried Fleischer
  • Publication number: 20020150354
    Abstract: An apparatus and packaging scheme that ensures that alignments between signal sending and detecting components in transceivers are optimized and maintained over the lifetime of the apparatus. This is accomplished through use of a pair of polymer optical modules, which are used to couple light sent to and received from respective fiber optic cables. During a pre-alignment process, head portions of the polymer optical modules are inserted into respective slots defined in a standoff that is mounted on an optical sub-assembly to which an emitter and detector are mounted, whereby these slots are configured so that the head portions slide along the sidewalls of the slots during assembly. During a subsequent active alignment process, each polymer optical module is positioned relative to its respective emitter or detector until a maximum signal is detected, whereupon the position of the components is quick-set using a UV-sensitive adhesive. Additional adhesive may then be added to further secure the components.
    Type: Application
    Filed: March 29, 2001
    Publication date: October 17, 2002
    Inventors: Brett Zaborsky, Rao Peddada, Andrew Alduino, Douglas Crafts, Siegfried Fleischer