Patents by Inventor Ravindra Vaman Shenoy

Ravindra Vaman Shenoy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11877041
    Abstract: An image sensor including a planar sensor array, a lens configured to form an optical image on the planar sensor array and characterized by a locus of focal points on a curved surface, and a cover glass with multiple thickness levels or multiple cover glasses of different sizes. The one or more cover glasses are configured to shift the locus of focal points for large field angles, such that there are multiple intersections between the planar sensor array and the locus of focal points for a large FOV, and thus multiple zones with best focus on the planar sensor array.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: January 16, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Russell Gruhlke, Ravindra Vaman Shenoy, Jon Lasiter, Donald William Kidwell, Khurshid Syed Alam, Kebin Li
  • Patent number: 11711594
    Abstract: An image sensor device includes two or more image sensor arrays (or two or more regions of an image sensor array) and a low-power processor in a same package for capturing two or more images of an object, such as an eye of a user, using light in two or more wavelength bands, such as visible band, near-infrared band, and short-wave infrared band. The image sensor device includes one or more lens assemblies and/or a beam splitter for forming an image of the object on each of the two or more image sensor arrays. The image sensor device also includes one or more filters configured to select light from multiple wavelength bands for imaging by the respective image sensor arrays.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: July 25, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Jon Lasiter, Ravindra Vaman Shenoy, Ravishankar Sivalingam, Russell Gruhlke, Donald William Kidwell, Khurshid Syed Alam, Kebin Li
  • Patent number: 11678043
    Abstract: Various aspects of the present disclosure generally relate to a sensor module. In some aspects, a sensor module may include a collar configured to be attached to a camera module for a user device. The collar may include a first opening that is configured to align with an aperture of a camera of the camera module, and a second opening. The sensor module may include a sensor embedded in the collar. The sensor may be aligned with the second opening of the collar. Numerous other aspects are provided.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: June 13, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Russell Gruhlke, Jon Lasiter, Ravindra Vaman Shenoy, Ravishankar Sivalingam, Kebin Li, Khurshid Syed Alam
  • Patent number: 11620806
    Abstract: Various aspects of the present disclosure generally relate to optical character detection. In some aspects, a user device may receive, from a vision sensor, a first image that is associated with a first optical character image. The user device may determine, using an image processing model, that the first image depicts the first optical character image. The user device may cause, based at least in part on determining that the first image depicts the first optical character image, a camera to capture a second image that is associated with a second optical character image. The user device may perform an action associated with the second image. Numerous other aspects are provided.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: April 4, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Ravishankar Sivalingam, Russell Gruhlke, Ravindra Vaman Shenoy, Donald William Kidwell, Jr., Evgeni Gousev, Kebin Li, Khurshid Syed Alam, Edwin Chongwoo Park, Arnold Jason Gum
  • Patent number: 11450964
    Abstract: An apparatus is disclosed for an antenna with a conductive cage. In an example aspect, the apparatus includes a ground plane with at least one opening. The apparatus also includes at least one antenna assembly with at least one radiating element, at least one feed via, and a conductive cage. The radiating element is implemented on a first plane that is substantially parallel to the ground plane. The feed via is connected to the at least one radiating element and is configured to connect to at least one transmission line through the opening. The conductive cage includes at least three ground vias, which are connected to the ground plane at positions that are distributed around the opening. Lengths of the at least three ground vias extend a portion of a distance between the ground plane and the radiating element.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: September 20, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Seong Heon Jeong, Mohammad Ali Tassoudji, Jeremy Darren Dunworth, Jon Lasiter, Ravindra Vaman Shenoy
  • Publication number: 20220279137
    Abstract: An image sensor device includes two or more image sensor arrays (or two or more regions of an image sensor array) and a low-power processor in a same package for capturing two or more images of an object, such as an eye of a user, using light in two or more wavelength bands, such as visible band, near-infrared band, and short-wave infrared band. The image sensor device includes one or more lens assemblies and/or a beam splitter for forming an image of the object on each of the two or more image sensor arrays. The image sensor device also includes one or more filters configured to select light from multiple wavelength bands for imaging by the respective image sensor arrays.
    Type: Application
    Filed: March 1, 2021
    Publication date: September 1, 2022
    Inventors: Jon LASITER, Ravindra Vaman SHENOY, Ravishankar SIVALINGAM, Russell GRUHLKE, Donald William KIDWELL, Khurshid Syed ALAM, Kebin LI
  • Patent number: 11411321
    Abstract: An antenna system includes: a ground conductor; a substrate; a pair of planar dipole conductors disposed such that at least a portion of the substrate is disposed between the ground conductor and the pair of dipole conductors; a pair of energy couplers each electrically connected to a respective one of the pair of dipole conductors; and a pair of isolated lobes including electrically-conductive material. The pair of isolated lobes are electrically separate from the pair of dipole conductors and the pair of energy couplers, and disposed between the pair of dipole conductors and the ground conductor.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: August 9, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jon Lasiter, Donald William Kidwell, Jr., Ravindra Vaman Shenoy, Mohammad Ali Tassoudji, Jeremy Darren Dunworth, Vladimir Aparin, Yu-Chin Ou, Seong Heon Jeong
  • Patent number: 11366543
    Abstract: Implementations of the subject matter described herein relate to sensors including piezoelectric micromechanical ultrasonic transducer (PMUT) sensor elements and arrays thereof. The PMUT sensor elements may be switchable between a non-ultrasonic force detection mode and an ultrasonic imaging mode. A PMUT sensor element may include a diaphragm that is capable of a static displacement on application of a force and is capable of a dynamic displacement when the PMUT sensor element transmits or receives ultrasonic signals. In some implementations, a PMUT sensor element includes a two dimensional-electron gas structure on the diaphragm. The sensors may further include a sensor controller configured to switch between a non-ultrasonic force detection mode and an ultrasonic imaging mode for one or more of the PMUT sensor elements, wherein an applied force is measured in the non-ultrasonic force detection mode and wherein an object is imaged ultrasonically during the ultrasonic imaging mode.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: June 21, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Firas Sammoura, David William Burns, Ravindra Vaman Shenoy
  • Patent number: 11320847
    Abstract: Reducing the space occupied by a voltage regulation integrated circuit (IC) that includes an inductor is achieved by implementing the inductor as a 3D inductor having windings formed of conductive elements integrated into a lower substrate, a circuit layer, and an upper substrate, and positioning other components within a core space of the 3D inductor in the circuit layer. The space occupied by the inductor is shared with the other circuit components and with the structural layers of the voltage regulation IC. A voltage regulation IC may be a switched-mode power supply (SMPS) that includes an inductor with a capacitor and/or a switching circuit. The inductor is implemented as upper horizontal traces in an upper substrate, lower horizontal traces in a lower substrate, and vertical interconnects in a circuit layer between the upper substrate and the lower substrate, and the conductive elements form the 3D inductor as a rectangular coil.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: May 3, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jonghae Kim, Ravindra Vaman Shenoy, Milind Shah, Evgeni Gousev, Periannan Chidambaram
  • Patent number: 11277559
    Abstract: In one example, an image sensor module comprises one or more covers having at least a first opening and a second opening, a first lens mounted in the first opening and having a first field of view (FOV) centered at a first axis having a first orientation, a second lens mounted in the second opening and having a second FOV centered at a second axis having a second orientation different from the first orientation, a first image sensor housed within the one or more covers and configured to detect light via the first lens, and a second image sensor housed within the one or more covers and configured to detect light via the second lens. The first image sensor and the second image sensor are configured to provide, based on the detected light, image data of a combined FOV larger than each of the first FOV and the second FOV.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: March 15, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jon Lasiter, Evgeni Gousev, Ravindra Vaman Shenoy, Russell Gruhlke, Khurshid Syed Alam, Kebin Li, Edwin Chongwoo Park
  • Publication number: 20220077586
    Abstract: An apparatus is disclosed for an antenna with a conductive cage. In an example aspect, the apparatus includes a ground plane with at least one opening. The apparatus also includes at least one antenna assembly with at least one radiating element, at least one feed via, and a conductive cage. The radiating element is implemented on a first plane that is substantially parallel to the ground plane. The feed via is connected to the at least one radiating element and is configured to connect to at least one transmission line through the opening. The conductive cage includes at least three ground vias, which are connected to the ground plane at positions that are distributed around the opening. Lengths of the at least three ground vias extend a portion of a distance between the ground plane and the radiating element.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 10, 2022
    Inventors: Seong Heon Jeong, Mohammad Ali Tassoudji, Jeremy Darren Dunworth, Jon Lasiter, Ravindra Vaman Shenoy
  • Publication number: 20220030148
    Abstract: An image sensor including a planar sensor array, a lens configured to form an optical image on the planar sensor array and characterized by a locus of focal points on a curved surface, and a cover glass with multiple thickness levels or multiple cover glasses of different sizes. The one or more cover glasses are configured to shift the locus of focal points for large field angles, such that there are multiple intersections between the planar sensor array and the locus of focal points for a large FOV, and thus multiple zones with best focus on the planar sensor array.
    Type: Application
    Filed: July 23, 2020
    Publication date: January 27, 2022
    Inventors: Russell GRUHLKE, Ravindra Vaman SHENOY, Jon LASITER, Donald William KIDWELL, Khurshid Syed ALAM, Kebin LI
  • Patent number: 11228086
    Abstract: An antenna package comprising a chip package including a plurality of feed lines, a first half antenna subassembly electrically coupled to the feed lines, and a second half antenna subassembly electrically coupled to the feed lines, wherein the first and second half antenna subassemblies point away from each other in a direction substantially perpendicular to the chip package. The antenna subassemblies may be millimeter (mm) wave antennas covering from approximately 24 to 43.5 GHz. The antenna subassemblies include a flex substrate formed from printed circuit boards (PCB) or flex-film PCB.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: January 18, 2022
    Assignee: Qualcomm Incorporated
    Inventors: Jon Lasiter, Ravindra Vaman Shenoy, Mohammad Ali Tassoudji, Seong Heon Jeong, Jeremy Darren Dunworth
  • Patent number: 11223116
    Abstract: Certain aspects of the present disclosure provide a glass ceramic antenna package having a large bandwidth (e.g., 19 GHz) for millimeter wave (mmWave) applications, for example. The antenna package generally includes an antenna element comprising a first substrate layer and a second substrate layer, wherein the first substrate layer comprises an antenna, wherein the second substrate layer comprises shielding elements and feed lines, and wherein the feed lines are electrically coupled to the antenna. The antenna package also includes a lead frame adjacent to one or more lateral surfaces of the antenna element.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: January 11, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jon Lasiter, Seong Heon Jeong, Ravindra Vaman Shenoy, Jeremy Darren Dunworth, Mohammad Ali Tassoudji
  • Publication number: 20210400178
    Abstract: Various aspects of the present disclosure generally relate to a sensor module. In some aspects, a sensor module may include a collar configured to be attached to a camera module for a user device. The collar may include a first opening that is configured to align with an aperture of a camera of the camera module, and a second opening. The sensor module may include a sensor embedded in the collar. The sensor may be aligned with the second opening of the collar. Numerous other aspects are provided.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Inventors: Russell GRUHLKE, Jon LASITER, Ravindra Vaman SHENOY, Ravishankar SIVALINGAM, Kebin LI, Khurshid Syed ALAM
  • Publication number: 20210384292
    Abstract: A voltage regulator having a coil inductor is integrated or embedded in a system-on-chip (SOC) device. The coil inductor is fabricated on an inductor wafer with through vias, and the inductor wafer is joined with an SOC wafer for integration with the SOC device.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 9, 2021
    Inventors: Karim ARABI, Ravindra Vaman SHENOY, Evgeni Petrovich GOUSEV, Mete ERTURK
  • Patent number: 11115576
    Abstract: Various aspects of the present disclosure generally relate to a sensor module. In some aspects, a sensor module may include a collar configured to be attached to a camera module for a user device. The collar may include a first opening that is configured to align with an aperture of a camera of the camera module, and a second opening. The sensor module may include a sensor embedded in the collar. The sensor may be aligned with the second opening of the collar. Numerous other aspects are provided.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: September 7, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Russell Gruhlke, Jon Lasiter, Ravindra Vaman Shenoy, Ravishankar Sivalingam, Kebin Li, Khurshid Syed Alam
  • Publication number: 20210271275
    Abstract: Reducing the space occupied by a voltage regulation integrated circuit (IC) that includes an inductor is achieved by implementing the inductor as a 3D inductor having windings formed of conductive elements integrated into a lower substrate, a circuit layer, and an upper substrate, and positioning other components within a core space of the 3D inductor in the circuit layer. The space occupied by the inductor is shared with the other circuit components and with the structural layers of the voltage regulation IC. A voltage regulation IC may be a switched-mode power supply (SMPS) that includes an inductor with a capacitor and/or a switching circuit. The inductor is implemented as upper horizontal traces in an upper substrate, lower horizontal traces in a lower substrate, and vertical interconnects in a circuit layer between the upper substrate and the lower substrate, and the conductive elements form the 3D inductor as a rectangular coil.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 2, 2021
    Inventors: Jonghae Kim, Ravindra Vaman Shenoy, Milind Shah, Evgeni Gousev, Periannan Chidambaram
  • Publication number: 20210175636
    Abstract: An antenna system includes: a ground conductor; a substrate; a pair of planar dipole conductors disposed such that at least a portion of the substrate is disposed between the ground conductor and the pair of dipole conductors; a pair of energy couplers each electrically connected to a respective one of the pair of dipole conductors; and a pair of isolated lobes including electrically-conductive material. The pair of isolated lobes are electrically separate from the pair of dipole conductors and the pair of energy couplers, and disposed between the pair of dipole conductors and the ground conductor.
    Type: Application
    Filed: December 5, 2019
    Publication date: June 10, 2021
    Inventors: Jon LASITER, Donald William KIDWELL, JR., Ravindra Vaman SHENOY, Mohammad Ali TASSOUDJI, Jeremy Darren DUNWORTH, Vladimir Aparin, Yu-Chin OU, Seong Heon JEONG
  • Patent number: 10867740
    Abstract: Some aspects pertain to an inductor apparatus that includes a first metal layer including a plurality of first interconnects, a second metal including a plurality of second interconnects, a first dielectric layer between the first metal layer and the second metal layer, and an inductor. The inductor includes a plurality of vias, where the plurality of vias are configured to couple the plurality of first interconnects to the plurality of second interconnects. The inductor includes a plurality of inductor loops formed by the plurality of vias, the plurality of first interconnects and the plurality of second interconnects. The inductor further includes a first magnetic layer and a second magnetic layer, located between the first interconnects and the second interconnects; and a third magnetic layer and an optional fourth magnetic layer outside of the plurality of inductor loops.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 15, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Donald William Kidwell, Jr., Ravindra Vaman Shenoy, Alan Lewis, Christopher Feuling Ferguson