Abstract: In the examples provided herein, a vascular pattern recognition system integrated onto a portable card includes a vascular pattern detection system to obtain image data of blood vessels of a finger to be swiped across a detection area on the portable card, wherein the vascular pattern detection system includes a near infrared light source and an image sensor array. The vascular pattern recognition system also includes an image processor to process the image data to generate a scanned vascular pattern and compare the scanned vascular pattern to a pre-stored pattern stored on the portable card to authenticate the image data, and a security processor to generate a transaction code to authorize a transaction upon authentication of the image data.

Abstract: In one example, a device to process analog sensor data is described. For example, a device may include at least one analog sensor to generate a first set of analog voltage signals and a crossbar array including a plurality of memristors. In one example, the crossbar array is to receive an input vector of the first set of analog voltage signals, generate an output vector comprising a second set of analog voltage signals that is based upon a dot product of the input vector and a matrix comprising resistance values of the plurality of memristors, detect a pattern of the output vector, and activate a processor upon a detection of the pattern.

Abstract: In example implementations, an apparatus includes a bus waveguide, a plurality of optical gates coupled to the bus waveguide and an injection coupler. The bus waveguide receives a plurality of constraint signals. Each optical gate outputs an internal state via a local phase shift when at least one of the plurality of constraint signals has a wavelength that matches a respective resonant wavelength. The injection coupler combines the at least one of the plurality of constraint signals with additional constraint signals that are injected. An error is detected in a bit of a message when an overall phase shift has occurred to the at least one of the plurality of constraint signals causing a power level to exceed a power level threshold of an optical gate when the at least one of the plurality of constraint signals constructively interferes with the additional constraint signals that are injected.

Abstract: An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer.

Abstract: Examples disclosed herein relate to multi-wavelength semiconductor comb lasers. In some examples disclosed herein, a multi-wavelength semiconductor comb laser may include a waveguide included in an upper silicon layer of a silicon-on-insulator (SOI) substrate. The comb laser may include a quantum dot (QD) active gain region above the SOI substrate defining an active section in a laser cavity of the comb laser and a dispersion tuning section included in the laser cavity to tune total cavity dispersion of the comb laser.

Abstract: One example includes an optical port-shuffling module. The module includes a plurality of inputs to receive a respective plurality of optical signals. The module also includes a plurality of outputs to provide the respective plurality of optical signals from the optical port-shuffling module. The module further includes a plurality of total-internal-reflection (TIR) mirrors arranged in optical paths of at least a portion of the plurality of optical signals to reflect the at least a portion of the plurality of optical signals to at least a portion of the plurality of outputs to shuffle the plurality of optical signals between the plurality of inputs and the plurality of outputs.

Abstract: Compact photonics platforms and methods of forming the same are provided. An example of a compact photonics platform includes a layered structure having an active region along a longitudinal axis, a facet having an angle no less than a critical angle formed at at least one longitudinal end of the active region, and a waveguide having at least one grating coupler positioned in alignment with the angled facet to couple light out to or in from the waveguide.

Abstract: In example implementations, an apparatus includes a plurality of nodes, a pump coupled to the plurality of nodes and a connection network. In one example, each one of the plurality of nodes may store a value. The pump provides energy to the each one of the plurality of nodes. The connection network may include a two dimensional array of elements, wherein each group of the two dimensional array of elements is in communication with a respective one of the plurality of nodes, wherein the connection network may be tuned with parameters associated with encoding of an Ising problem. The connection network may process the value stored in each one of the plurality of nodes. The Ising problem may be solved by the value stored in each one of the plurality of nodes at a minimum energy level.

Abstract: An example device in accordance with an aspect of the present disclosure includes a first semiconductor layer disposed on a substrate, a dielectric layer disposed between the first semiconductor layer and a second semiconductor layer dissimilar from the first semiconductor layer. A capacitor is formed of at least a portion of the first semiconductor layer, the dielectric layer, and the second semiconductor layer, and is to be included in an optical waveguide resonator.

Abstract: Examples disclosed herein relate to multi-wavelength semiconductor lasers. In some examples disclosed herein, a multi-wavelength semiconductor laser may include a silicon-on-insulator (SOI) substrate and a quantum dot (QD) layer above the SOI substrate. The QD layer may include and active gain region and may have at least one angled junction at one end of the QD layer. The SOI substrate may include a waveguide in an upper silicon layer and a mode converter to facilitate optical coupling of a lasing mode to the waveguide.

Abstract: In the examples provided herein, a vascular pattern recognition system integrated onto a portable card includes a vascular pattern detection system to obtain image data of blood vessels of a finger to be swiped across a detection area on the portable card, wherein the vascular pattern detection system includes a near infrared light source and an image sensor array. The vascular pattern recognition system also includes an image processor to process the image data to generate a scanned vascular pattern and compare the scanned vascular pattern to a pre-stored pattern stored on the portable card to authenticate the image data, and a security processor to generate a transaction code to authorize a transaction upon authentication of the image data.

Abstract: Various embodiments of the present invention are directed to optical devices comprising planar lenses. In one aspect, an optical device includes two or more planar lenses, and one or more dielectric layers. Each planar lens includes a non-periodic, sub-wavelength grating layer, and each dielectric layer is disposed adjacent to at least one planar lens to form a solid structure. The two or more planar lenses are substantially parallel and arranged to have a common optical axis so that light transmitted through the optical device substantially parallel to the optical axis is refracted by the two or more planar lenses.

Abstract: In one example, a device includes a photodetector to generate an electrical signal in response to an optical signal and a transimpedance amplifier unit to receive the electrical signal. In one example, the transimpedance amplifier unit may include a first inverter unit, a second inverter unit coupled to the first inverter unit, and a third inverter unit coupled to the second inverter unit. In one example the third inverter unit may include a feedback resistor and a first n-type transistor in parallel to the feedback resistor, where the first n-type transistor is to provide a variable gain of the third inverter unit.

Abstract: An example device includes a doped absorption region to receive optical energy and generate free electrons from the received optical energy. The example device also includes a doped charge region to increase an electric field. The example device also includes an intrinsic multiplication region to generate additional free electrons from impact ionization of the generated free electrons. The example device includes a doped contact region to conduct the free electrons and the additional free electrons.

Abstract: One example includes an optical transmitter system. The system includes a waveguide to receive and propagate an optical signal. The system also includes a ring modulation system comprising a ring resonator that is optically coupled to the waveguide and is to resonate a given wavelength of the optical signal in response to an input data signal that is provided to a modulation amplifier to provide carrier injection to change a refractive index of the ring resonator to resonate the given wavelength of the optical signal to modulate the optical signal. The system further includes a tuning controller associated with the ring modulation system. The tuning controller can implement iterative feedback tuning of the ring modulation system based on a relative amplitude of an optical intensity of the given wavelength in the ring resonator and a variable reference amplitude to substantially stabilize the ring resonator with respect to the given wavelength.

Abstract: Examples described herein relate to a driver circuit. In an example, the circuit includes a first input for receiving a first signal and a second input for receiving a second signal that is an inverse of the first signal. The circuit also includes a first driver array electrically coupling the first input to a first DC isolator and a first delay tap line electrically coupling the second input to the first DC isolator. The circuit further includes a second driver array electrically coupling the second input to a second DC isolator and a second delay tap line electrically coupling the first input to the second DC isolator. A carrier controller of the circuit is electrically coupled between the first DC isolator and the second DC isolator.

Abstract: Compact photonics platforms and methods of forming the same are provided. An example of a compact photonics platform includes a layered structure having an active region along a longitudinal axis, a facet having an angle no less than a critical angle formed at least one longitudinal end of the active region, and a waveguide having at least one grating coupler positioned in alignment with the angled facet to couple light out to or in from the waveguide.

Abstract: According to an example of the present disclosure a direct bandgap (DBG) semiconductor structure is bonded to an assembly comprising a silicon photonics (SiP) wafer and a complementary metal-oxide-semiconductor (CMOS) wafer. The SiP wafer includes photonics circuitry and the CMOS wafer includes electronic circuitry.

Abstract: One example includes a bias-based Mach-Zehnder modulation (MZM) system. The system includes a Mach-Zehnder modulator to receive and split an optical input signal and to provide an intensity-modulated optical output signal based on a high-frequency data signal to modulate a relative phase of the split optical input signal to transmit data and based on a bias voltage to modulate the relative phase of the split optical input signal to tune the Mach-Zehnder modulator. The system also includes a bias feedback controller to compare a detection voltage associated with the intensity-modulated output signal with a reference voltage to measure an extinction ratio associated with an optical power of the intensity-modulated optical output signal and to adjust the bias voltage based on the comparison to substantially maximize the extinction ratio.

Abstract: In the examples provided herein, an optical logic gate includes multiple couplers, where no more than two types of couplers are used in the optical logic gate, and further wherein the two types of couplers consist of: a 3-dB coupler and a weak coupler with a given transmission-to-reflection ratio. The optical logic gate also includes a first resonator, wherein the first resonator comprises a photonic crystal resonator or a nonlinear ring resonator, wherein in operation, the first resonator has a dedicated continuous wave input to bias a complex amplitude of a total field input to the first resonator such that the total field input is either above or below a nonlinear switching threshold of the first resonator, where the optical logic gate is an integrated photonic circuit.