Patents by Inventor Raymond Rosado

Raymond Rosado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120086024
    Abstract: Multiple configuration light emitting diode (LED) devices and methods are disclosed wherein LEDs within the device can be selectively configured for use in higher voltage, or variable voltage, applications. Variable arrangements of LEDs can be configured. Arrangements can include one or more LEDs connected in series, parallel, and/or a combination thereof. A surface over which one or more LEDs may be mounted can comprise one or more electrically and/or thermally isolated portions.
    Type: Application
    Filed: January 31, 2011
    Publication date: April 12, 2012
    Inventors: Peter S. Andrews, Raymond Rosado, Michael P. Laughner, David T. Emerson, Jeffrey C Britt
  • Publication number: 20120068198
    Abstract: High density multi-chip LED devices are described. Embodiments of the present invention provide high-density, multi-chip LED devices with relatively high efficiency and light output in a compact size. An LED device includes a plurality of interconnected LED chips and an optical element such as a lens. The LED chips may be arranged in two groups, wherein the LED chips within each group are connected in parallel and the groups are connected in series. In some embodiments, the LED device includes a submount, which may be made of ceramic. The submount may include a connection bus and semicircular areas to which chips are bonded. Wire bonds can be connected to the LED chips so that all the wire bonds are disposed on the outside of a group of LED chips to minimize light absorption.
    Type: Application
    Filed: January 31, 2011
    Publication date: March 22, 2012
    Applicant: CREE, INC.
    Inventors: Peter Scott Andrews, Raymond Rosado, Michael P. Laughner, David T. Emerson, Amber C. Abare, Jeffrey C. Britt
  • Publication number: 20120069564
    Abstract: Multi-chip LED devices are described. Embodiments of the present invention provide multi-chip LED devices with relatively high efficiency and good color rendering. The LED device includes a plurality of interconnected LED chips and an optical element such as a lens. The optical element may be molded from silicone. The LED chips may be connected in parallel. In some embodiments, the LED device includes a submount, which may be made of a ceramic material such as alumina or aluminum nitride. Wire bonds can be connected to the LED chips so that all the wire bonds tend the outside of a group of LED chips. Various sizes and types of LED chips may be used, including vertical LED chips and sideview LED chips.
    Type: Application
    Filed: January 31, 2011
    Publication date: March 22, 2012
    Applicant: CREE, INC.
    Inventors: Peter Scott Andrews, Raymond Rosado, Michael P. Laughner, David T. Emerson, Jeffrey C. Britt
  • Patent number: 7642626
    Abstract: A semiconductor device including a semiconductor structure defining a mesa having a mesa surface and mesa sidewalls, and first and second passivation layers. The first passivation layer may be on at least portions of the mesa sidewalls, at least a portion of the mesa surface may be free of the first passivation layer, and the first passivation layer may include a first material. The second passivation layer may be on the first passivation layer, at least a portion of the mesa surface may be free of the second passivation layer, and the second passivation layer may include a second material different than the first material.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: January 5, 2010
    Assignee: Cree, Inc.
    Inventors: Kevin Ward Haberern, Raymond Rosado, Michael John Bergman, David Todd Emerson
  • Patent number: 7613219
    Abstract: Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer. Related devices are also discussed.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: November 3, 2009
    Assignee: Cree, Inc.
    Inventors: Kevin Ward Haberern, Raymond Rosado, Michael John Bergman, David Todd Emerson
  • Publication number: 20080135982
    Abstract: A semiconductor device including a semiconductor structure defining a mesa having a mesa surface and mesa sidewalls, and first and second passivation layers. The first passivation layer may be on at least portions of the mesa sidewalls, at least a portion of the mesa surface may be free of the first passivation layer, and the first passivation layer may include a first material. The second passivation layer may be on the first passivation layer, at least a portion of the mesa surface may be free of the second passivation layer, and the second passivation layer may include a second material different than the first material.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 12, 2008
    Inventors: Kevin Ward Haberern, Raymond Rosado, Michael John Bergman, David Todd Emerson
  • Patent number: 7329569
    Abstract: A method of forming a semiconductor device may include forming a semiconductor structure on a substrate wherein the semiconductor structure defines a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate. A first passivation layer can be formed on at least portions of the mesa sidewalls and on the substrate adjacent the mesa sidewalls wherein at least a portion of the mesa surface is free of the first passivation layer and wherein the first passivation layer comprises a first material. A second passivation layer can be formed on the first passivation layer wherein at least a portion of the mesa surface is free of the second passivation layer, and wherein the second passivation layer comprises a second material different than the first material. Related devices are also discussed.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: February 12, 2008
    Assignee: Cree, Inc.
    Inventors: Kevin Ward Haberern, Raymond Rosado, Michael John Bergman, David Todd Emerson
  • Publication number: 20070007544
    Abstract: Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer. Related devices are also discussed.
    Type: Application
    Filed: September 13, 2006
    Publication date: January 11, 2007
    Inventors: Kevin Haberern, Raymond Rosado, Michael Bergman, David Emerson
  • Patent number: 7160747
    Abstract: Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: January 9, 2007
    Assignee: Cree, Inc.
    Inventors: Kevin Ward Haberern, Raymond Rosado, Michael John Bergman, David Todd Emerson
  • Publication number: 20040147054
    Abstract: A method of forming a semiconductor device may include forming a semiconductor structure on a substrate wherein the semiconductor structure defines a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate. A first passivation layer can be formed on at least portions of the mesa sidewalls and on the substrate adjacent the mesa sidewalls wherein at least a portion of the mesa surface is free of the first passivation layer and wherein the first passivation layer comprises a first material. A second passivation layer can be formed on the first passivation layer wherein at least a portion of the mesa surface is free of the second passivation layer, and wherein the second passivation layer comprises a second material different than the first material. Related devices are also discussed.
    Type: Application
    Filed: December 19, 2003
    Publication date: July 29, 2004
    Inventors: Kevin Ward Haberern, Raymond Rosado, Michael John Bergman, David Todd Emerson
  • Publication number: 20040147094
    Abstract: Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer.
    Type: Application
    Filed: December 19, 2003
    Publication date: July 29, 2004
    Inventors: Kevin Ward Haberern, Raymond Rosado, Michael John Bergman, David Todd Emerson
  • Patent number: D650343
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: December 13, 2011
    Assignee: Cree, Inc.
    Inventors: Peter S. Andrews, Raymond Rosado, Michael P. Laughner, David T. Emerson, Jeffrey C. Britt
  • Patent number: D658139
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: April 24, 2012
    Assignee: Cree, Inc.
    Inventors: Peter Scott Andrews, Raymond Rosado, Michael P. Laughner, David T. Emerson, Amber C. Abare, Jeffrey C. Britt