Abstract: A bidirectional heterojunction transistor includes first and second conduction electrodes, first and second gates between the conduction electrodes, and first and second reference electrodes between the gates. The transistor further includes a superposition of semiconductor layers, including channel zones that are vertically in line with the gates, a first conduction zone between the first conduction electrode and the first channel zone, and a second conduction zone between the second conduction electrode and the second channel zone. The superposition of semiconductor layers also includes a third conduction zone that is separated from the first and second conduction zones by the first and second channel zones, respectively, and a first electrical connection that is connected to the third conduction zone and to the first reference electrode.

Abstract: An electronic circuit is provided, including, on one same substrate, an inverter branch formed by high side and low side transistors, and the drivers of the high side and the low side transistors. The drivers include logic gates configured to receive one same PWM input signal and to generate two alternated command signals sent to the high side and the low side transistors. An inverter system is also provided, including the electronic circuit and laser optocouplers configured to electrically insulate the electronic circuit of a controller delivering a pulse width modulation (PWM) input signal and a main supply electrically supplying the drivers.

Abstract: A bidirectional heterojunction transistor includes first and second conduction electrodes, first and second gates between the conduction electrodes, and first and second reference electrodes between the gates. The transistor further includes a superposition of semiconductor layers, including channel zones that are vertically in line with the gates, a first conduction zone between the first conduction electrode and the first channel zone, and a second conduction zone between the second conduction electrode and the second channel zone. The superposition of semiconductor layers also includes a third conduction zone that is separated from the first and second conduction zones by the first and second channel zones, respectively, and a first electrical connection that is connected to the third conduction zone and to the first reference electrode.

Abstract: An electronic circuit is provided, including, on one same substrate, an inverter branch formed by high side and low side transistors, and the drivers of the high side and the low side transistors. The drivers include logic gates configured to receive one same PWM input signal and to generate two alternated command signals sent to the high side and the low side transistors. An inverter system is also provided, including the electronic circuit and laser optocouplers configured to electrically insulate the electronic circuit of a controller delivering a pulse width modulation (PWM) input signal and a main supply electrically supplying the drivers.

Abstract: An optocoupler is provided, including at least one light source and at least one matrix of photovoltaic cells facing the at least one light source, the at least one light source being configured to receive, at an input, an input electrical signal, and to generate, at an output, according to the input electrical signal, a light signal, sent to the at least one matrix of photovoltaic cells, the at least one matrix of photovoltaic cells being configured to receive, at the input, at least partially the light signal and to deliver, at the output, at least one output electrical signal, at the level of at least two connection pads, and the at least one light source being a matrix of laser diodes.

Abstract: A normally-off heterojunction field-effect transistor is provided, including a superposition of a first layer, of III-N type, and of a second layer, of III-N type, so as to form a two-dimensional electron gas; a stack of an n-doped third layer making electrical contact with the second layer, and of a p-doped fourth layer placed in contact with and on the third layer, a first conductive electrode and a second conductive electrode making electrical contact with the two-dimensional electron gas; a dielectric layer disposed against a lateral face of the fourth layer; and a control electrode separated from the lateral face of the fourth layer by the dielectric layer.

Abstract: An optoelectronic device including a light emitting component and a field-effect transistor, the optoelectronic device including a first semiconductor layer made of a III-V or II-VI compound doped a first conductivity type; an active layer of the light-emitting component; and a second semiconductor layer made of the III-V or III-VI compound doped a second conductivity type opposite the first type, the active layer being sandwiched between the first and second semiconductor layers, wherein the channel of the field-effect transistor is located in the first semiconductor layer, the first semiconductor layer being uninterrupted between the field-effect transistor and the lightemitting component.

Abstract: A protection circuit including an input interface; an output interface; a current sensor connected between an input terminal and an output terminal; first and second HEMT transistors of normally closed type connected in series with the current sensor and connected in series by way of a connection node; a transformer, a primary winding of which is connected to the terminals of the current sensor; a rectifier bridge exhibiting two input terminals connected to the terminals of a secondary winding of the transformer, and exhibiting output terminals, an output terminal of the rectifier bridge being connected to the control gates of the transistors, an output terminal of the rectifier bridge being connected to the connection node.

Abstract: An optoelectronic device including a light emitting component and a field-effect transistor, the optoelectronic device including a first semiconductor layer made of a III-V or II-VI compound doped a first conductivity type; an active layer of the light-emitting component; and a second semiconductor layer made of the III-V or III-VI compound doped a second conductivity type opposite the first type, the active layer being sandwiched between the first and second semiconductor layers, wherein the channel of the field-effect transistor is located in the first semiconductor layer, the first semiconductor layer being uninterrupted between the field-effect transistor and the lightemitting component.

Abstract: An electronic device having at least a first HEMT transistor and bias circuit able to at least reverse bias the first HEMT transistor by applying an electric voltage VSD of a positive value between a source of the first HEMT transistor and a drain of the first HEMT transistor. The first HEMT transistor is able to be ON when a value of an electric voltage VGD between a gate of the first HEMT transistor and the drain of the first HEMT transistor is higher than a value of a threshold voltage Vth of the first HEMT transistor. The electronic device has, during a forward biasing, a behavior similar to that of a forward biased or reverse biased Zener diode.

Abstract: A protection circuit including an input interface; an output interface; a current sensor connected between an input terminal and an output terminal; first and second HEMT transistors of normally closed type connected in series with the current sensor and connected in series by way of a connection node; a transformer, a primary winding of which is connected to the terminals of the current sensor; a rectifier bridge exhibiting two input terminals connected to the terminals of a secondary winding of the transformer, and exhibiting output terminals, an output terminal of the rectifier bridge being connected to the control gates of the transistors, an output terminal of the rectifier bridge being connected to the connection node.

Abstract: An electronic device including at least: a first HEMT transistor, bias means able to at least reverse bias the first HEMT transistor by applying an electric voltage VSD of a positive value between a source of the first HEMT transistor and a drain of the first HEMT transistor, and wherein the first HEMT transistor is able to be ON when a value of an electric voltage VGD between a gate of the first HEMT transistor and the drain of the first HEMT transistor is higher than a value of a threshold voltage Vth of the first HEMT transistor, the electronic device having, during a forward biasing, a behaviour similar to that of a forward biased or reverse biased Zener diode.

Abstract: An apparatus includes a bidirectional hetero junction field-effect power transistor having a gate between conduction electrodes, semiconductor layers, one formed on the other, and the two meeting at an electron gas layer interface, and a reference electrode embedded in one layer. The reference electrode connects to a potential of a zone of the gas layer that is plumb with the reference electrode, A distance between the reference electrode and one conduction electrode and between the gate and that conduction electrode is between 45 and 55% of a distance between the conduction electrodes. A control circuit connected to the reference electrode generates a switching voltage for switching the transistor from a reference electrode voltage, and to apply a control voltage to the gate.

Abstract: A transistor power switch device comprising an array of vertical transistor elements for carrying current between first and second faces of a semiconductor body. The device also comprises a semiconductor monitor element comprising first and second semiconductor monitor regions in the semiconductor body and a monitor conductive layer distinct from the current carrying conductive layer of the transistor array. The semiconductor monitor element presents semiconductor properties representative of the transistor array. Characteristics of the semiconductor monitor element are measured as representative of characteristics of the transistor array. Source metal ageing of a transistor power switch device is monitored by measuring and recording a parameter which is a function of a sheet resistance of the monitor conductive layer when the transistor power switch device is new and comparing it with its value after operation of the device.

Abstract: An apparatus includes a bidirectional hetero junction field-effect power transistor having a gate between conduction electrodes, semiconductor layers, one formed on the other, and the two meeting at an electron gas layer interface, and a reference electrode embedded in one layer. The reference electrode connects to a potential of a zone of the gas layer that is plumb with the reference electrode, A distance between the reference electrode and one conduction electrode and between the gate and that conduction electrode is between 45 and 55% of a distance between the conduction electrodes. A control circuit connected to the reference electrode generates a switching voltage for switching the transistor from a reference electrode voltage, and to apply a control voltage to the gate.

Abstract: A transistor power switch device comprising a semiconductor body presenting opposite first and second faces, an array of vertical field-effect transistor elements for carrying current between the first and second faces is provided. The array of transistor elements comprises at the first face an array of source regions of a first semiconductor type, at least one body region of a second semiconductor type opposite to the first type interposed between the source regions and the second face, at least one control electrode for switchably controlling flow of the current through the second transistor region, and a conductive layer contacting the source regions and insulated from the control electrode by at least one insulating layer.

Abstract: A transistor power switch device comprising an array of vertical transistor elements for carrying current between the first and second faces of a semiconductor body and a vertical avalanche diode electrically in parallel with the array of vertical transistors. The array of transistor elements includes at the first face an array of source regions of a first semiconductor type, at least one p region of a second semiconductor type opposite to the first type interposed between the source regions and the second face, at least one control electrode for switchably controlling flow of the current through the p region, and a conductive layer contacting the source regions and insulated from the control electrode.

Abstract: A transistor power switch device comprising an array of vertical transistor elements for carrying current between first and second faces of a semiconductor body. The device also comprises a semiconductor monitor element comprising first and second semiconductor monitor regions in the semiconductor body and a monitor conductive layer distinct from the current carrying conductive layer of the transistor array. The semiconductor monitor element presents semiconductor properties representative of the transistor array. Characteristics of the semiconductor monitor element are measured as representative of characteristics of the transistor array. Source metal ageing of a transistor power switch device is monitored by measuring and recording a parameter which is a function of a sheet resistance of the monitor conductive layer when the transistor power switch device is new and comparing it with its value after operation of the device.

Abstract: A transistor power switch device comprising a semiconductor body presenting opposite first and second faces, an array of vertical field-effect transistor elements for carrying current between the first and second faces, is provided. The array of transistor elements comprises at the first face an array of source regions of a first semiconductor type, at least one body region of a second semiconductor type opposite to the first type interposed between the source regions and the second face, at least one control electrode for switchably controlling flow of the current through the second transistor region, and a conductive layer contacting the source regions and insulated from the control electrode by at least one insulating layer.

Abstract: A transistor power switch device comprising an array of vertical transistor elements for carrying current between the first and second faces of a semiconductor body and a vertical avalanche diode electrically in parallel with the array of vertical transistors. The array of transistor elements includes at the first face an array of source regions of a first semiconductor type, at least one p region of a second semiconductor type opposite to the first type interposed between the source regions and the second face, at least one control electrode for switchably controlling flow of the current through the p region, and a conductive layer contacting the source regions and insulated from the control electrode.