Patents by Inventor Ren-Wei Xiao

Ren-Wei Xiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10050103
    Abstract: A method of making a metal insulator metal (MIM) capacitor includes forming a copper bulk layer in a base layer, wherein the copper bulk layer includes a hillock extending from a top surface thereof. The method further includes depositing an etch stop layer over the base layer and the copper bulk layer. The method further includes depositing an oxide-based dielectric layer over the etch stop layer. The method further includes forming a capacitor over the oxide-based dielectric layer. The method further includes forming a contact extending through the oxide-based dielectric layer and the etch stop layer to contact the copper bulk layer, wherein the forming of the contact removes the hillock.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: August 14, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fang-Ting Kuo, Ren-Wei Xiao, Sheng Yu Lin, Chia-Wei Liu, Chun Hua Chang, Chien-Ying Wu
  • Patent number: 9984971
    Abstract: Various embodiments of mechanisms for forming a slotted metal pad over a TSV in substrate are provided. The dielectric structures in the slotted metal pad reduce dishing effect during planarization of the slotted metal pad. As a result, the risk of having metal stringers in upper metal level(s) caused by the dishing effect is greatly reduced.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: May 29, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chuan Tseng, Chia-Wei Liu, Fang-Ting Kuo, Ren-Wei Xiao
  • Publication number: 20170263694
    Abstract: A method of making a metal insulator metal (MIM) capacitor includes forming a copper bulk layer in a base layer, wherein the copper bulk layer includes a hillock extending from a top surface thereof. The method further includes depositing an etch stop layer over the base layer and the copper bulk layer. The method further includes depositing an oxide-based dielectric layer over the etch stop layer. The method further includes forming a capacitor over the oxide-based dielectric layer. The method further includes forming a contact extending through the oxide-based dielectric layer and the etch stop layer to contact the copper bulk layer, wherein the forming of the contact removes the hillock.
    Type: Application
    Filed: May 25, 2017
    Publication date: September 14, 2017
    Inventors: Fang-Ting KUO, Ren-Wei XIAO, Sheng Yu LIN, Chia-Wei LIU, Chun Hua CHANG, Chien-Ying WU
  • Publication number: 20170179030
    Abstract: Various embodiments of mechanisms for forming a slotted metal pad over a TSV in substrate are provided. The dielectric structures in the slotted metal pad reduce dishing effect during planarization of the slotted metal pad. As a result, the risk of having metal stringers in upper metal level(s) caused by the dishing effect is greatly reduced.
    Type: Application
    Filed: December 27, 2016
    Publication date: June 22, 2017
    Inventors: Chung-Chuan Tseng, Chia-Wei Liu, Fang-Ting Kuo, Ren-Wei Xiao
  • Patent number: 9666660
    Abstract: A metal insulator metal (MIM) capacitor includes a base layer and a copper bulk layer in the base layer. The MIM capacitor further includes an etch stop layer over the base layer and the copper bulk layer and an oxide-based dielectric layer over the etch stop layer. The MIM capacitor further includes a capacitor bottom layer over the oxide-based dielectric layer, an insulator layer over the capacitor bottom layer, and a capacitor top layer over the insulator layer.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: May 30, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fang-Ting Kuo, Ren-Wei Xiao, Sheng Yu Lin, Chia-Wei Liu, Chun Hua Chang, Chien-Ying Wu
  • Patent number: 9530690
    Abstract: Various embodiments of mechanisms for forming a slotted metal pad over a TSV in substrate are provided. The dielectric structures in the slotted metal pad reduce dishing effect during planarization of the slotted metal pad. As a result, the risk of having metal stringers in upper metal level(s) caused by the dishing effect is greatly reduced.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: December 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chuan Tseng, Chia-Wei Liu, Cindy Kuo, Ren-Wei Xiao
  • Publication number: 20160056078
    Abstract: Various embodiments of mechanisms for forming a slotted metal pad over a TSV in substrate are provided. The dielectric structures in the slotted metal pad reduce dishing effect during planarization of the slotted metal pad. As a result, the risk of having metal stringers in upper metal level(s) caused by the dishing effect is greatly reduced.
    Type: Application
    Filed: November 3, 2015
    Publication date: February 25, 2016
    Inventors: Chung-Chuan Tseng, Chia-Wei Liu, Cindy Kuo, Ren-Wei Xiao
  • Patent number: 9177914
    Abstract: Various embodiments of mechanisms for forming a slotted metal pad over a TSV in substrate are provided. The dielectric structures in the slotted metal pad reduce dishing effect during planarization of the slotted metal pad. As a result, the risk of having metal stringers in upper metal level(s) caused by the dishing effect is greatly reduced.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: November 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chuan Tseng, Chia-Wei Liu, Cindy Kuo, Ren-Wei Xiao
  • Publication number: 20150048483
    Abstract: A metal insulator metal (MIM) capacitor includes a base layer and a copper bulk layer in the base layer. The MIM capacitor further includes an etch stop layer over the base layer and the copper bulk layer and an oxide-based dielectric layer over the etch stop layer. The MIM capacitor further includes a capacitor bottom layer over the oxide-based dielectric layer, an insulator layer over the capacitor bottom layer, and a capacitor top layer over the insulator layer.
    Type: Application
    Filed: August 16, 2013
    Publication date: February 19, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fang-Ting KUO, Ren-Wei XIAO, Sheng Yu LIN, Chia-Wei LIU, Chun Hua CHANG, Chien-Ying WU
  • Publication number: 20140131841
    Abstract: Various embodiments of mechanisms for forming a slotted metal pad over a TSV in substrate are provided. The dielectric structures in the slotted metal pad reduce dishing effect during planarization of the slotted metal pad. As a result, the risk of having metal stringers in upper metal level(s) caused by the dishing effect is greatly reduced.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 15, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chuan Tseng, Chia-Wei Liu, Cindy Kuo, Ren-Wei Xiao