Abstract: Some embodiments include apparatus and methods having an amplifier, a capacitor network coupled to the amplifier, and switching circuitry coupled to the amplifier and the capacitor network. The switching circuit is configured to successively apply a selected reference voltage selected from among a first reference voltage, a second reference voltage, and a third reference voltage to the capacitor network in response to a digital input code to generate an output voltage. Additional embodiments are disclosed.

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.

Abstract: The present invention is related to a pipelined analog-to-digital converter (ADC) utilizing a power distribution scheme selectively delivering both constant and variable reference currents in selected proportions to a plurality of stages and operational transconductive amplifiers (OTAs). This permits the ADC to maintain an optimized speed over power consumption ratio over a wide data rate range. Since the invention is capable of supporting a large operating range while maintaining very low power consumption relative to the data rate, the pipelined ADC in accordance with the present invention is particularly adaptable to a large number of applications.

Abstract: A dual mode, single ended to fully differential converter structure is incorporated into a fully differential sample and hold structure which can be coupled with an ADC as a front end for mixed mode applications. The structure incorporates additional switches which allow negative and positive charges to be sampled on both negative and positive sides of the structure. By inverting the sampled charge on one side, single ended to fully differential conversion is obtained. The structure can be implemented in a compact, generic block which performs single ended to fully differential conversions as well as sample and hold functions, without compromising speed and accuracy in either mode.

Abstract: Some embodiments include apparatus and methods having an amplifier, a capacitor network coupled to the amplifier, and switching circuitry coupled to the amplifier and the capacitor network. The switching circuit is configured to successively apply a selected reference voltage selected from among a first reference voltage, a second reference voltage, and a third reference voltage to the capacitor network in response to a digital input code to generate an output voltage. Additional embodiments are disclosed.

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.

Abstract: A dual mode, single ended to fully differential converter structure is incorporated into a fully differential sample and hold structure which can be coupled with an ADC as a front end for mixed mode applications. The structure incorporates additional switches which allow negative and positive charges to be sampled on both negative and positive sides of the structure. By inverting the sampled charge on one side, single ended to fully differential conversion is obtained. The structure can be implemented in a compact, generic block which performs single ended to fully differential conversions as well as sample and hold functions, without compromising speed and accuracy in either mode.

Abstract: Some embodiments include apparatus and methods having a first module with a capacitor network configured to receive a sample of an analog input signal and an amplifier configured to couple to the capacitor network in a plurality of arrangements to successively generate a plurality of residue signals at an amplifier output node of the amplifier without resetting the amplifier between generation of least two of the plurality of residue signals, and a second module configured to generate a digital signal based on a plurality of intermediate codes generated from the sample signal and the plurality of residue signals, the digital signal including a digital value of the sample.

Abstract: A differential sense amplifier can perform data sensing using a very low supply voltage.

Abstract: Some embodiments include apparatus and methods having a first module with a capacitor network configured to receive a sample of an analog input signal and an amplifier configured to couple to the capacitor network in a plurality of arrangements to successively generate a plurality of residue signals at an amplifier output node of the amplifier without resetting the amplifier between generation of least two of the plurality of residue signals, and a second module configured to generate a digital signal based on a plurality of intermediate codes generated from the sample signal and the plurality of residue signals, the digital signal including a digital value of the sample.

Abstract: The present invention is related to a pipelined analog-to-digital converter (ADC) utilizing a power distribution scheme selectively delivering both constant and variable reference currents in selected proportions to a plurality of stages and operational transconductive amplifiers (OTAs). This permits the ADC to maintain an optimized speed over power consumption ratio over a wide data rate range. Since the invention is capable of supporting a large operating range while maintaining very low power consumption relative to the data rate, the pipelined ADC in accordance with the present invention is particularly adaptable to a large number of applications.

Abstract: The present invention is related to a pipelined analog-to-digital converter (ADC) utilizing a power distribution scheme selectively delivering both constant and variable reference currents in selected proportions to a plurality of stages and operational transconductive amplifiers (OTAs). This permits the ADC to maintain an optimized speed over power consumption ratio over a wide data rate range. Since the invention is capable of supporting a large operating range while maintaining very low power consumption relative to the data rate, the pipelined ADC in accordance with the present invention is particularly adaptable to a large number of applications.

Abstract: The present invention is related to a pipelined analog-to-digital converter (ADC) utilizing a power distribution scheme selectively delivering both constant and variable reference currents in selected proportions to a plurality of stages and operational transconductive amplifiers (OTAs). This permits the ADC to maintain an optimized speed over power consumption ratio over a wide data rate range. Since the invention is capable of supporting a large operating range while maintaining very low power consumption relative to the data rate, the pipelined ADC in accordance with the present invention is particularly adaptable to a large number of applications.