Patents by Inventor Ricardo Berger

Ricardo Berger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7668179
    Abstract: A method for determining at least one parameter for a particular AAL2 channel identifier (AAL2-CID), according to which the behavior of the transmission of the user information stream is determined per application. Preferably, the present invention enables the QOS (quality of service) for the user application to be determined by setting a plurality of such parameters for a specific AAL2 CID. The present invention preferably encompasses the ability to determine any parameter that is usually set for the ATM channel to instead be set for the CID separately. These parameters may be dynamically adjusted according to the real-time state of the system, channel and the specific CID. Additionally the selection and usage of said parameters may also be influenced by the real time state of the system, channel and the specific CID. Examples of such parameters include, but are not limited to, traffic type, priority, any type of QOS parameter, timing parameters, and so forth.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: February 23, 2010
    Assignee: Wintegra Ltd.
    Inventors: Ricardo Berger, Avi Hagai, Eran Kirzner, Ronen Weiss
  • Patent number: 7411962
    Abstract: In some embodiments of the present invention, applications presenting user information streams at a service access point (SAP) to AAL-2 above the Common Part Sublayer (CPS) may provide values for predefined parameters that may determine how frames of information in the user information streams are segmented in run-time into CPS packets and packed into CPS protocol data units (CPS-PDU), each of which forms the payload of an ATM cell. These parameter values may be defined per channel identifier (CID) or for a group of CIDs.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: August 12, 2008
    Assignee: Wintegra Ltd.
    Inventors: Ricardo Berger, Eran Kirzner, Ronen Weiss, Yoram Yeivin
  • Publication number: 20050008019
    Abstract: A method for determining at least one parameter for a particular AAL2 channel identifier (AAL2-CID), according to which the behavior of the transmission of the user information stream is determined per application. Preferably, the present invention enables the QOS (quality of service) for the user application to be determined by setting a plurality of such parameters for a specific AAL2 CID. The present invention preferably encompasses the ability to determine any parameter that is usually set for the ATM channel to instead be set for the CID separately. These parameters may be dynamically adjusted according to the real-time state of the system, channel and the specific CID. Additionally the selection and usage of said parameters may also be influenced by the real time state of the system, channel and the specific CID. Examples of such parameters include, but are not limited to, traffic type, priority, any type of QOS parameter, timing parameters, and so forth.
    Type: Application
    Filed: August 5, 2004
    Publication date: January 13, 2005
    Inventors: Ricardo Berger, Avi Hagai, Eran Kirzner, Ronen Weiss
  • Publication number: 20040057438
    Abstract: In some embodiments of the present invention, applications presenting user information streams at a service access point (SAP) to AAL-2 above the Common Part Sublayer (CPS) may provide values for predefined parameters that may determine how frames of information in the user information streams are segmented in run-time into CPS packets and packed into CPS protocol data units (CPS-PDU), each of which forms the payload of an ATM cell. These parameter values may be defined per channel identifier (CID) or for a group of CIDs.
    Type: Application
    Filed: June 18, 2003
    Publication date: March 25, 2004
    Inventors: Ricardo Berger, Eran Kirzner, Ronen Weiss, Yoram Yeivin
  • Publication number: 20040045002
    Abstract: A multi-processing method, system and apparatus having a processor, a request order key issuer connected to the processor which may issue an request order key to a task to be performed by the processor. A resource access order provider may be connected to the processor and may issue access order values to a task in relation to the task's request order key.
    Type: Application
    Filed: April 7, 2003
    Publication date: March 4, 2004
    Inventors: Ricardo Berger, Yoram Yeivin
  • Patent number: 5631589
    Abstract: A transition control circuit (2) for controlling the transitions of an output signal, at an output node (8) of a driver circuit, in dependence on the logic state of an input signal at an input node (10). The output signal being switchable between a first logic state and a second logic state. The transition control circuit (2) comprises first means (16) and second means (14). The first means (16) is enabled when the output signal has the first logic state and the input signal has the second logic state, and is disabled when the output signal has the second logic state or the input signal has the first logic state. Once enabled, the first means (16) couples the output node (8) to a first supply line (GNDA) whereby the output signal switches to the second logic state. The second means (14) is enabled when the output signal has the second logic state and the input signal has the second logic state, and is disabled when the output signal has the first logic state or the input signal has the first logic state.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: May 20, 1997
    Assignee: Motorola, Inc.
    Inventors: Yachin Afek, Claudine Tordjman, Ricardo Berger
  • Patent number: 5359568
    Abstract: This invention relates to a FIFO memory system (10) comprising a plurality of FIFO memories (20) for handling transmission queues in a serial digital communication system. The memory system comprises a plurality of blocks of memory (20a-c, 21a-e), each of the plurality of FIFO memories being assigned a block (20a) of the plurality of blocks of memory, the unassigned blocks of memory forming a block pool (21a-e). The memory system further comprises memory management means (LLT, PT) for adding at least one of the unassigned blocks of memory from the block pool to a FIFO memory on writing to the FIFO memory whereby the size of the FIFO memory is selectably variable, and for returning a block of memory from a FIFO memory to the block pool once the contents of the block of memory have been read.
    Type: Grant
    Filed: June 3, 1993
    Date of Patent: October 25, 1994
    Assignee: Motorola, Inc.
    Inventors: Aviel Livay, Ricardo Berger, Alexander Joffe