Patents by Inventor Richard A. Flasck

Richard A. Flasck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6266037
    Abstract: A wafer based active matrix reflective light encoding system formed on a conventional wafer including a specular reflective back surface and an LC or similar characteristic material formed thereon which is electronically altered to impart or encode information onto a light beam which is directed to and reflected therefrom. The LC material preferably is a solid light modulating material having bodies of LC material suspended in the solid material. The matrix transistors can be any conventional type of crystalline based structure, such as NMOS, CMOS, or PMOS and can be coupled to the bit and/or word lines by fuses to prevent shorts associated with a single pixel from shorting a whole line. The pixel capacitor can include a junction or oxide type capacitor or a combination thereof. The matrix bit and/or word lines can include strapping to prevent open lines.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: July 24, 2001
    Assignee: RAF Electronics
    Inventor: Richard A. Flasck
  • Patent number: 5123847
    Abstract: An improved method of manufacturing active matrix display backplanes with thin film transistors thereon and a drive scheme therefor. A refractory metal covers the indium tin oxide (ITO) layer, patterned to form a gate electrode for the transistors and to protect the pixel pad ITO during formation of the transistors. To reduce shorts and capacitance between the gate and the source or the drain, an intermetal dielectric is patterned to form a central portion over a planar portion of the gate region and to cover any exposed gate edges.
    Type: Grant
    Filed: January 16, 1990
    Date of Patent: June 23, 1992
    Inventors: Scott H. Holmberg, Richard A. Flasck
  • Patent number: 5108172
    Abstract: An improved active matrix reflective projection system utilizing a conventional wafer includes a reflective image plane module forming two focal images. The image plane module includes light directing and reflecting structures and a wafer based active matrix. A source of light is directed to the image plane module active matrix from a first image plane. The active matrix imparts information onto a light beam reflected therefrom. The image plane module projects the reflected beam for viewing, such as through one or more lens. The active matrix reflective projection system can be a monochrome projector including a single reflective image plane module or can be a full color system including three reflective image plane modules. Each color image plane module operates on a single color component, red, green or blue, which then are combined on a screen or before projecting on the screen to form the full color projection image.
    Type: Grant
    Filed: September 24, 1990
    Date of Patent: April 28, 1992
    Assignee: RAF Electronics Corp.
    Inventor: Richard A. Flasck
  • Patent number: 5024524
    Abstract: A reflective image plane module including light directing and reflecting structures and a wafer based active matrix mated thereto. A source of light is directed to the reflective image plane module wherein the wafer based active matrix imparts or encodes information onto a light beam reflected therefrom. The reflective image plane module projects the reflected beam for imaging or viewing, such as through one or more lens. The reflective image plane module includes a prism or mirror which passes the light or light component through a first surface to the wafer based active matrix mated to a second surface and which projects the reflected light from the first surface to be viewed or imaged.The wafer based active matrix includes a specular reflective back surface and an LC or similar type material formed thereon which is electronically altered to impart the information to the light beam reflected therefrom.
    Type: Grant
    Filed: August 11, 1989
    Date of Patent: June 18, 1991
    Assignee: RAF Electronics Corp.
    Inventor: Richard A. Flasck
  • Patent number: 5022750
    Abstract: An active matrix reflective projection system utilizing a conventional wafer includes a reflective image plane module. The reflective image plane module includes light directing and reflecting structures and a wafer based active matrix mated thereto. A source of light is directed to the reflective image plane module wherein the wafer based active matrix imparts information onto a light beam reflected therefrom. The reflective image plane module projects the reflected beam for viewing, such as through one or more lens. The active matrix reflective projection system can be a monochrome projector including a single reflective image plane module or can be a full color system including three reflective image plane modules. Each color reflective image plane module operates on a single color component, red, green or blue, which then are combined on a screen or before projecting on the screen to form the full color projection image.
    Type: Grant
    Filed: August 11, 1989
    Date of Patent: June 11, 1991
    Assignee: RAF Electronics Corp.
    Inventor: Richard A. Flasck
  • Patent number: 4842378
    Abstract: LCD screen illumination is provided by a neon tube formed to fit closely adjacent the screen. A tube formed to fit around the periphery of the screen shielded from the viewer's eyes can be utilized to front light the screen. A serpentine shaped tube can be placed adjacent the back of the screen to back light the screen. The tube can be formed to have a size coextensive with the screen configuration and can have a light diffuser between the tube and the screen to provide uniform illumination. The tube can provide any desired color, an adjustable high maximum surface brightness, high electrical efficiency and a narrow profile.
    Type: Grant
    Filed: April 7, 1987
    Date of Patent: June 27, 1989
    Assignee: Alphasil, Inc.
    Inventors: Richard A. Flasck, Benny Irwin, Scott H. Holmberg
  • Patent number: 4820222
    Abstract: Subdivided pixels are provided with interconnected and hence redundant row and column bus lines to reduce fatal defects. The respective redundant row and column lines also can be interconnected between subpixels to further reduce defects. One defective subpixel is generally an acceptable non-fatal defect, since the rest of the subpixels are still operative. The subpixels also can be formed with common row and column bus lines. The pixels or subpixels can be connected in a serial serpentine pattern to test all row or all column bus lines at once. After testing, the serial connections are broken.
    Type: Grant
    Filed: December 31, 1986
    Date of Patent: April 11, 1989
    Assignee: Alphasil, Inc.
    Inventors: Scott H. Holmberg, Richard A. Flasck
  • Patent number: 4736229
    Abstract: An improved method of manufacturing active matrix display backplanes with thin film transistors thereon and a drive scheme therefor. A refractory metal covers the indium tin oxide (ITO) layer, patterned to form a gate electrode for the transistors and to protect the pixel pad ITO during formation of the transistors. To reduce shorts and capacitance between the gate and the source or the drain, an intermetal dielectric is patterned to form a central portion over a planar portion of the gate region and to cover any exposed gate edges.
    Type: Grant
    Filed: May 11, 1983
    Date of Patent: April 5, 1988
    Assignee: Alphasil Incorporated
    Inventors: Scott H. Holmberg, Richard A. Flasck
  • Patent number: 4651185
    Abstract: An improved method of manufacturing thin film transistors. A gate metal is patterned to form a gate electrode and a drain, gate and source contact pad for the transistor. To reduce shorts and capacitance between the gate and the source or the drain, a dielectric is patterned to form a central portion over a planar portion of the gate region and to cover any exposed gate edges.
    Type: Grant
    Filed: April 15, 1985
    Date of Patent: March 17, 1987
    Assignee: Alphasil, Inc.
    Inventors: Scott H. Holmberg, Richard A. Flasck
  • Patent number: 4599705
    Abstract: A programmable cell for use in programmable electronic arrays such as PROM devices, logic arrays, gate arrays and die interconnect arrays. The cells have a highly non-conductive state settable and substantially non-resettable into a highly conductive state. The cells have a resistance of 10,000 ohms or more in the non-conductive state which are settable into the conductive state by a threshold voltage of 20 volts or less, a current of 25 milliamps or less, for 1000 microseconds or less. The cells in the conductive state have a resistance of 500 ohms or less. The cells have a maximum permittable processing temperature of 200.degree. centigrade or more and a storage temperature of 175.degree. centigrade or more. The cells can be formed from chalcogenide elements, such as germanium tellurium and selenium or combination thereof. The cells also can be formed from tetrahedral elements, such as silicon, germanium and carbon or combinations thereof.
    Type: Grant
    Filed: September 10, 1984
    Date of Patent: July 8, 1986
    Assignee: Energy Conversion Devices, Inc.
    Inventors: Scott Holmberg, Richard A. Flasck
  • Patent number: 4545112
    Abstract: An improved method of manufacturing thin film transistors. A gate metal is patterned to form a gate electrode and a drain, gate and source contact pad for the transistor. To reduce shorts and capacitance between the gate and the source or the drain, an intermetal dielectric is patterned to form a central portion over a planar portion of the gate region and to cover any exposed gate edges.
    Type: Grant
    Filed: August 15, 1983
    Date of Patent: October 8, 1985
    Assignee: Alphasil Incorporated
    Inventors: Scott H. Holmberg, Richard A. Flasck
  • Patent number: 4499557
    Abstract: An improved programmable cell for use in programmable electronic arrays such as PROM devices, logic arrays, gate arrays and die interconnect arrays. The cells have a highly non-conductive state settable and non-resettable into a highly conductive state. The cells have a resistance of 10,000 ohms or more in the non-conductive state which are settable into the conductive state by a threshold voltage of 10 volts or less, a current of 25 milliamps or less, for 100 microseconds or less. The cells in the conductive state have a resistance of 100 ohms or less. The cells have a maximum permittable processing temperature of 400.degree. centigrade or more and a storage temperature of 175.degree. centigrade or more. The cells are formed from doped silicon alloys including at least hydrogen and/or fluorine and contain from about 0.1 to 5 percent dopant. The cells can be plasma deposited from silane or silicon tetrafluoride and hydrogen with 20 to 150,000 ppm of dopant.
    Type: Grant
    Filed: July 6, 1981
    Date of Patent: February 12, 1985
    Assignee: Energy Conversion Devices, Inc.
    Inventors: Scott H. Holmberg, Richard A. Flasck
  • Patent number: 4458297
    Abstract: Disclosed is a wafer substrate for integrated circuits (1) which by itself may be made either of conductive or non-conductive material. This substrate carries two planes or layers of patterned metal (19, 20), thus providing two principal levels of interconnection. An insulation layer (21) is placed between the metal layers and also between the lower metal layer and the substrate if the latter is conductive. Connections between the metal layers or between the metal layer and the substrate can be made through via holes in the insulator layer or layers, respectively.The real estate provided by the substrate (1) is divided up into special areas used for inner cells (2) outer cells (3) signal hookup areas (4) and power hookup areas (5). The cells are intended to host the integrated circuit chips (24, 25) and to provide the bonding pads (8) for the signal connections between the chips and the substrate.
    Type: Grant
    Filed: November 29, 1982
    Date of Patent: July 3, 1984
    Assignees: Mosaic Systems, Inc., Burroughs Corporation
    Inventors: Herbert Stopper, Richard A. Flasck
  • Patent number: 4339255
    Abstract: The method for forming a metallic, dielectric or semiconductor modified amorphous glass material includes the steps of forming a fluid host matrix material on a substrate surface having relative movement thereto, such as a wheel; directing a fluid modifier material in a stream, as from a nozzle toward the substrate surface in a direction such that it converges with the host matrix material; maintaining the temperature of the substrate or wheel between 4.2.degree. K and ambient room temperature while rotating the wheel at a velocity of 1000 to 5000 rpm to obtain a surface velocity of between 1000 to 4000 centimeters per second thereby to obtain rapid quenching of the host and modifier materials as they contact one another at a rate of from 10.sup.4 to at least 10.sup.8 C per second or more to produce a ribbon of modified amorphous glass material in which the electrical and optical transport properties and the number and type of electronic configurations can be controlled.
    Type: Grant
    Filed: September 9, 1980
    Date of Patent: July 13, 1982
    Assignee: Energy Conversion Devices, Inc.
    Inventors: Stanford R. Ovshinsky, Richard A. Flasck
  • Patent number: 4332466
    Abstract: Apparatus for producing microform records from computer stored data or other electrical data signal sources forms on the screen of a cathode ray tube at rapidly occuring intervals successive hard copy-appearing images of such data which is reduced in size by a bundle of tapered fiber optic filaments with a wide light receiving end encompassing the screen of the cathode ray tube and a narrow light projecting end encompassing an area of the frame of a microfiche card. The successively produced images at the narrow end of the fiber optic filament bundle are applied to successive frames of a heat developable masking film strip requiring more time to develop than the imaging intervals and moved in step-by-step fashion past the narrow end of the fiber optic bundle, a heating bar and an image transfer station where a flash of light is passed through the masking film strip to transfer a negative image thereon to a frame of an archival add-on microfiche card-forming film.
    Type: Grant
    Filed: January 21, 1980
    Date of Patent: June 1, 1982
    Assignee: Energy Conversion Devices, Inc.
    Inventor: Richard Flasck
  • Patent number: 4170728
    Abstract: A heat-applying recording head to image selected microsize points of a heat imageable recording material comprises a heating wire support body having a thin recording material facing end with longitudinally closed spaced, transversely extending notches therein which form wire-positioning recesses which terminate in respective aligned edges to face the recording material. Fine threads of heating wire material extend in said notches and respectively bend around the aligned edges to extend along opposite faces of the support body. The threads of heating wire are substantially thicker than the depth of the notches so as to project substantially beyond the support body. The heating wire-forming threads along at least one of the faces of the support body to diverge progressively in a direction away from the recording material facing end of the support body and extend to relatively widely spaced current feeding terminal points.
    Type: Grant
    Filed: January 23, 1978
    Date of Patent: October 9, 1979
    Assignee: Energy Conversion Devices, Inc.
    Inventor: Richard Flasck
  • Patent number: 3983076
    Abstract: New amorphous semiconductor and chalcogenide compositions are provided exhibiting n-conductivity characteristics. Chalcogenide compositions, which are normally formed as p-type materials, are converted to n-type materials or are initially formed as n-type materials, by elevating the temperatures thereof below their crystallization temperature and substantially in excess of the temperature at which its conductivity at room temperature versus annealing temperature curve decreases sharply from a relatively high constant value and allowing the same to cool to room temperature.
    Type: Grant
    Filed: July 2, 1973
    Date of Patent: September 28, 1976
    Assignee: Energy Conversion Devices, Inc.
    Inventors: Howard K. Rockstad, Richard A. Flasck
  • Patent number: D320403
    Type: Grant
    Filed: September 12, 1988
    Date of Patent: October 1, 1991
    Assignee: Honeywell, Inc.
    Inventors: Richard A. Flasck, Thomas D. Stahl