Patents by Inventor Richard D. Baertsch

Richard D. Baertsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6426672
    Abstract: A signal processing circuit can be used to select between a high bias current and good noise performance or a low bias current and poorer noise performance. The circuit comprises an input device having high impedance and low noise characteristics. A first current source provides a minimal current level through the input device. Additional current sources provide additional current through the input device to improve noise performance of the circuit. The additional current sources can be switched into the circuit when improved noise performance is required, and switched out of the circuit to conserve power when improved noise performance is not required.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: July 30, 2002
    Assignee: General Electric Company
    Inventors: Scott W. Petrick, Lawrence R. Skrenes, Douglas E. Sease, Richard D. Baertsch
  • Patent number: 5065157
    Abstract: An improved high order interpolative oversampled (sigma delta) analog-to-digital converter network including a plurality of cascade-coupled integrator stages is formed on a single integrated circuit chip in a manner that conserves power and chip area. Each integrator stage includes a differential amplifier, at least one input capacitor and at least one feedback capacitor. The power dissipation and occupied chip area are minimized by down-sizing the chip area occupied by the capacitors and differential amplifiers (op amps) in all but the first integrator stage. The high gain of the first integrator stage makes the noise contribution of subsequent integrator stages negligible so that the higher noise of the subsequent integrator stages is tolerable.
    Type: Grant
    Filed: April 6, 1990
    Date of Patent: November 12, 1991
    Assignee: General Electric Company
    Inventors: David B. Ribner, Richard D. Baertsch
  • Patent number: 4638400
    Abstract: A capacitor structure which is particularly suitable for use in analog integrated circuit devices employs an intermediate layer of a refractory metal disposed in a thin layer overlying a flat dielectric surface. The thinness and the low reflectivity of the refractory metal facilitates precise patterning of the upper plate of the capacitor structure. In the present invention, capacitance is no longer determined by imprecise cuts through thick oxide layers or by patterning of thick metallization layers within these apertures. The use of refractory metals in the capacitor structure also readily permits the incorporation of resistive circuit elements.
    Type: Grant
    Filed: October 24, 1985
    Date of Patent: January 20, 1987
    Assignee: General Electric Company
    Inventors: Dale M. Brown, Manjin J. Kim, Richard D. Baertsch, Thomas L. Vogelsong
  • Patent number: 4446532
    Abstract: A plurality of charge storage cells, each including first and second storage regions and corresponding first and second electrodes insulatingly overlying the storage regions are provided in a semiconductor substrate. Means are provided for introducing into each of the first charge storage regions a respective quantity of charge proportional to a respective sample of an analog signal. Means are provided for developing a plurality of voltage waveforms, each of the waveforms including a series of periods, and each period constituted of first and second subperiods. Means are provided for applying each of the voltage waveforms to a respective one of the second electrodes of the cells.
    Type: Grant
    Filed: February 3, 1982
    Date of Patent: May 1, 1984
    Assignee: General Electric Company
    Inventors: Richard D. Baertsch, William E. Engeler
  • Patent number: 4302686
    Abstract: A charge transfer device is described for the conversion of a sequence of samples of a signal occurring at high frequency into simultaneous data samples occurring at a substantially lower frequency and substantially longer duration.
    Type: Grant
    Filed: June 23, 1980
    Date of Patent: November 24, 1981
    Assignee: General Electric Company
    Inventors: Richard D. Baertsch, William E. Engeler
  • Patent number: 4241263
    Abstract: A charge transfer shift register is described in which a first section is operated at a first clock frequency, a second section is operated at a second clock frequency, and an intermediate section located between the first and second sections is operated at fixed potential.
    Type: Grant
    Filed: November 16, 1978
    Date of Patent: December 23, 1980
    Assignee: General Electric Company
    Inventors: William E. Engeler, Richard D. Baertsch
  • Patent number: 4185318
    Abstract: A conductor-insulator-semiconductor (CIS) structure for a random access surface charge memory system is disclosed. The memory system comprises an array of memory cells including charge storage regions, charge transfer regions and charge receive-source regions formed along the surface-adjacent portions of a semiconductor substrate. A charge-storage line insulatingly overlies the storage regions of a row of memory cells and a bit line, comprising an extended region of opposite-conductivity-type, interconnects the receive-source regions of the same memory cells. Addressing in the Y-direction (word selection) is provided by charge transfer lines insulatingly overlying the charge transfer regions of a column of memory cells. Selected memory cells are addressed for read and write purposes by first activating the word select line which makes available one cell in each row of the memory. The desired row is then selected by means external to the array of memory cells.
    Type: Grant
    Filed: June 15, 1978
    Date of Patent: January 22, 1980
    Assignee: General Electric Company
    Inventors: William E. Engeler, Jerome J. Tiemann, Richard D. Baertsch
  • Patent number: 4178519
    Abstract: Input structures are described for sampling an analog signal and providing charge samples in accordance therewith to charge transfer devices.
    Type: Grant
    Filed: August 16, 1978
    Date of Patent: December 11, 1979
    Assignee: General Electric Company
    Inventors: William E. Engeler, Richard D. Baertsch
  • Patent number: 4165537
    Abstract: Input sampling circuits are described for converting an analog signal into charge samples for charge transfer devices.
    Type: Grant
    Filed: August 16, 1978
    Date of Patent: August 21, 1979
    Assignee: General Electric Company
    Inventors: William E. Engeler, Richard D. Baertsch
  • Patent number: 4146904
    Abstract: In a substrate of semiconductor material of one conductivity type and high resistivity, a thin layer of the same conductivity and low resistivity is provided adjacent a major surface of the substrate. A region of opposite conductivity type is provided in the substrate adjacent the major surface to form a PN junction therewith spaced adjacent to the thin layer. Zero bias is provided on the PN junction. Minority charge carriers generated in the semiconductor substrate underlying the thin layer in response to applied radiation diffuse to the region of opposite conductivity type and are sensed.
    Type: Grant
    Filed: December 19, 1977
    Date of Patent: March 27, 1979
    Assignee: General Electric Company
    Inventors: Richard D. Baertsch, Dale M. Brown, Marvin Garfinkel
  • Patent number: 4126852
    Abstract: A multiplying digital to analog converter providing a sequence of signal samples in which each sample represents the product of a respective sample of an analog input signal and a respective binary number is disclosed. The converter comprises a semiconductor device including a plurality of charge storage cells each paired with a respective digit of a binary number. The quantity of charge introduced into each of the storage regions is dependent on the sample of the analog signal and the presence of a "1" in the respective digit of the binary number. The product of the sample of the analog signal and the binary number is obtained by combining the charges so introduced into the storage regions.
    Type: Grant
    Filed: April 15, 1977
    Date of Patent: November 21, 1978
    Assignee: General Electric Company
    Inventor: Richard D. Baertsch
  • Patent number: 4124861
    Abstract: A charge transfer filter includes an accumulator charge storage location and means for alternately introducing charge into the accumulator charge storage location and then for removing a preselected fraction of the total charge in the accumulator charge storage location so that the total accumulated charge is known.
    Type: Grant
    Filed: October 1, 1975
    Date of Patent: November 7, 1978
    Assignee: General Electric Company
    Inventors: Richard D. Baertsch, William E. Engeler
  • Patent number: 4099075
    Abstract: In signal detection apparatus for sensing large excursion of a time varying signal from its average value, charge transfer circuits are utilized to provide a threshold level for detection which adapts to the changing average value of the background component of the time varying signal.
    Type: Grant
    Filed: March 23, 1977
    Date of Patent: July 4, 1978
    Assignee: General Electric Company
    Inventors: Howard S. Goldberg, William E. Engeler, Richard D. Baertsch
  • Patent number: 4097886
    Abstract: Geometries suitable for split or paired electrode structures of small effective dimensions which are readily implementable with a high degree of accuracy are provided.
    Type: Grant
    Filed: October 22, 1976
    Date of Patent: June 27, 1978
    Assignee: General Electric Company
    Inventors: Richard D. Baertsch, Jerome J. Tiemann
  • Patent number: 4032867
    Abstract: In a charge transfer transversal filter a semiconductor substrate is provided with main and parallel portions. A group of serially arranged electrodes insulatingly overlie and are uniformly spaced from the channel portions. The electrodes form with the substrate a plurality of stages of first and second charge transfer shift register over the main and parallel channel portions of the substrate, respectively. One electrode of each of the stages of the shift registers has a split along the length dimension thereof over the main channel portion dividing each of the one electrodes over the main channel portion into a first part and a second part with a third part overlying the parallel channel portion. The first parts of the one electrodes are connected to a first conductive line and the second and third parts of the one electrodes are connected to a second conductive line. The area of the first parts of the one electrodes being equal to the sum of the areas of the second and third parts of the one electrode.
    Type: Grant
    Filed: September 2, 1975
    Date of Patent: June 28, 1977
    Assignee: General Electric Company
    Inventors: William E. Engeler, Richard D. Baertsch
  • Patent number: 4004157
    Abstract: The output circuit includes a high gain differential amplifier having an inverting input terminal, a non-inverting input terminal and an output terminal with a feedback capacitance connected between the output terminal and the inverting input terminal. The input terminals are connected to first and second commonly phased lines of the charge transfer transversal filter. First and second charging and isolating means are connected between a source of operating voltage and the first and second commonly phased lines, respectively. The lines are charged periodically to the voltage of the source by the first and second charging and isolating means prior to the transfer of charge in a cycle of operation of the filter and are then isolated from the source during the transfer of charge in the filter by the first and second charging and isolating means.
    Type: Grant
    Filed: September 2, 1975
    Date of Patent: January 18, 1977
    Assignee: General Electric Company
    Inventors: Richard D. Baertsch, William E. Engeler, Jerome J. Tiemann
  • Patent number: 3969636
    Abstract: In a charge transfer device electrode operating voltage is applied through a high-gain differential amplifier having an inverting and a non-inverting input terminal with capacitive feedback from the output terminal to the inverting terminal. The inverting terminal is connected to the charge transfer device electrode. The non-inverting terminal is connected to a source of operating voltage. During the transfer of charge the voltage on the electrode is maintained substantially constant and a voltage change is produced at the output of the amplifier which is approximately equal to the induced charge divided by the feedback capacitance.
    Type: Grant
    Filed: June 30, 1975
    Date of Patent: July 13, 1976
    Assignee: General Electric Company
    Inventors: Richard D. Baertsch, Jerome J. Tiemann, William E. Engeler