Patents by Inventor Richard Egloff

Richard Egloff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6559068
    Abstract: A method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor (MOSFET) is provided. Specifically, the present invention provides a method for applying an oxide layer to a silicon carbide substrate so that the oxide-substrate interface of the resulting SiC MOSFET is improved. The method includes forming the oxide layer in the presence of metallic impurities.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: May 6, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Dev Alok, Emil Arnold, Richard Egloff, Satyendranath Mukherjee
  • Publication number: 20030008442
    Abstract: A method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor (MOSFET) is provided. Specifically, the present invention provides a method for applying an oxide layer to a silicon carbide substrate so that the oxide-substrate interface of the resulting SiC MOSFET is improved. The method includes forming the oxide layer in the presence of metallic impurities.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 9, 2003
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Dev Alok, Emil Arnold, Richard Egloff, Satyendranath Mukherjee
  • Patent number: 6313489
    Abstract: A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region and forms a lightly-doped drain region, and a drain contact region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by a surface insulation region.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: November 6, 2001
    Assignee: Philips Electronics North America Corporation
    Inventors: Theodore Letavic, Mark Simpson, Richard Egloff, Andrew Mark Warwick
  • Patent number: 5909627
    Abstract: Thin layers of semiconductor material having a high degree of surface uniformity are produced by: implantion of deuterium ions into a body of semiconductor material to form a buried region of high stress, the buried region defining a thin outer region of the body; attaching a stiffening carrier to the thin outer region of the semiconductor body; and heating the body at 350-450 degrees C. to separate the thin outer region. The separated layer is useful in the production of silicon-on-insulator semiconductor devices, and silicon-on-glass devices for liquid crystal display and microwave applications.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: June 1, 1999
    Assignee: Philips Electronics North America Corporation
    Inventor: Richard Egloff