Patents by Inventor Richard I. Hartley

Richard I. Hartley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5559334
    Abstract: A method of reconstructing selected features of a part manufactured according to a CAD model involves acquiring a set of linear push broom (LPB) projection images of the part acquired at different angles about an axis of rotation passing through the part. Acquiring a set of matrices M.sub.j j=1 . . . N, each of which maps 3D coordinates of the part to screen coordinates of one of the projection images. Reconstruction of 3D structures from the projection images requires identification of screen coordinates of each image which correspond to a point of the structure of the part to be reconstructed. Back projecting these screen coordinates modified by the distortion inherent in the LPB imaging device. This is accomplished by selecting a screen coordinate on a feature desired to be reconstructed. Computing a ray passing through the selected screen coordinate through an imaging center. Using each M matrix to map this ray to a hyperbola on the other images.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: September 24, 1996
    Assignee: General Electric Company
    Inventors: Rajiv Gupta, Richard I. Hartley
  • Patent number: 5550376
    Abstract: A method of calibrating a linear pushbroom imaging device used in non-destructive testing of a part manufactured according to a CAD model involves identifying the location of fixed reference points, such as tooling balls in the CAD model. Positioning the part on a fixture having tooling balls fixed relative to each other in the same manner as those in the CAD model. Adjusting the part on the fixture such that points on the surface of the part known to be accurate have the same locations relative to the tooling bails as the CAD part is to the CAD tooling balls. Obtaining several projection images of the part and tooling balls at different angles about an axis of rotation passing through the part. Using the known 3D locations of the center of the CAD tooling balls and the corresponding measured screen locations of the is actual tooling balls, transformation matrices, G, M.sub.
    Type: Grant
    Filed: May 22, 1995
    Date of Patent: August 27, 1996
    Assignee: General Electric Company
    Inventors: Rajiv Gupta, Julia A. Noble, Richard I. Hartley, Andrea M. Schmitz
  • Patent number: 5544254
    Abstract: An apparatus and method of classifying and sorting by shape crystalline objects such as synthetic diamonds in which an image of the object taken from an angle defined in relation to the object is compared to one or more templates in order to characterize the object.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: August 6, 1996
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Julia A. Noble, James C. M. Grande, William E. Jackson, Kenneth B. Welles, II, Jane S. Liu
  • Patent number: 5436829
    Abstract: An interactive system for producing X-ray fluoroscopic images determines X-ray tube photon count and voltage for producing acceptable quality images while minimizing X-ray radiation dosage to a subject. An image is created and a signal to noise (S/N) ratio is estimated from the image by a unitary transform method. The S/N ratio is determined by solving several simultaneous equations and the photon count is estimated to produce an image with a desired S/N ratio. Subsequent X-ray fluoroscopy images are produced with the optimum photon count Q, thereby reducing X-ray dosage. The optimization is repeated periodically to readjust the system.
    Type: Grant
    Filed: November 5, 1992
    Date of Patent: July 25, 1995
    Assignee: General Electric Company
    Inventor: Richard I. Hartley
  • Patent number: 5396531
    Abstract: An interactive system for producing X-ray fluoroscopic images determines X-ray tube photon count and voltage for producing acceptable quality images while minimizing X-ray radiation dosage to a subject. An image is created and a signal to noise (S/N) ratio is estimated from the image, assuming a Poisson model is assumed for the X-ray image. The S/N ratio is determined by solving several simultaneous equations and the photon count is estimated to produce an image with a desired S/N ratio. Subsequent X-ray fluoroscopy images are produced with the optimum photon count Q, thereby reducing X-ray dosage. The optimization is repeated periodically to readjust the system.
    Type: Grant
    Filed: November 5, 1992
    Date of Patent: March 7, 1995
    Assignee: General Electric Company
    Inventor: Richard I. Hartley
  • Patent number: 5361307
    Abstract: An automated system for determining artifacts in images indicating defects in an imaging device being tested employs a constant radiation source which supplies radiation of spatially uniform intensity to the imaging device to be tested. The imaging device then creates a flood image A.sup.(0). A region of interest (ROI) mask means for all pixel values of flood image A.sup.(0) sets values to zero outside of the imaging devices field of view to produce a flood image A.sup.(1). An image normalization means normalizes flood image A.sup.(1) to have an average value of zero producing a normalized flood image A. A correlation means performs an autocorrelation of normalized flood image A to produce a correlation field which is then masked to select portions of the correlation field.
    Type: Grant
    Filed: March 25, 1993
    Date of Patent: November 1, 1994
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, A. Nadeem Ishaque, Aiman A. Abdel-Malek
  • Patent number: 5325198
    Abstract: An automated system for determining artifacts in images indicating defects in an imaging device being tested employs a constant radiation source which supplies radiation of spatially uniform intensity to the imaging device to be tested. The imaging device then creates a flood image A.sup.(0). A region of interest (ROI) mask unit for all pixel values of flood image A.sup.(0) sets values to zero outside of the imaging devices field of view to produce a flood image A.sup.(1). An image normalization unit normalizes flood image A.sup.(1) to have an average value of zero producing a normalized flood image A. A unitary transform unit performs a unitary transformation of normalized flood image A to produce an transform field which is then masked to select portions of the transform field. The squared magnitudes of the transform values of the selected regions are summed and the resulting sum is normalized for mask shape and flood image intensity to determine and quantify the presence of specific artifacts.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: June 28, 1994
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Aiman A. Abdel-Malek, A. Nadeem Ishaque
  • Patent number: 5317755
    Abstract: A method of transforming systolic arrays using bit-parallel arithmetic into arrays using digit-serial arithmetic is described. Digit-serial computation is an area-time efficient method of doing high-speed arithmetic calculations, having the advantage through appropriate choice of digit and word size of allowing throughput capacity to be matched to design needs. For a certain class of systolic arrays, however, digit-serial arithmetic allows a further very significant benefit, by transforming arrays in which processors are under-utilized into arrays with 100% processor utilization. As an example, converting a well-known band-matrix multiplication array to use digit-serial processing is calculated to give an improvement of more than three times in area-time efficiency.
    Type: Grant
    Filed: April 10, 1991
    Date of Patent: May 31, 1994
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Peter F. Corbett
  • Patent number: 5293415
    Abstract: An interactive system for producing acceptable quality fluoroscopy images determines X-ray tube photon count and voltage while minimizing X-ray radiation dosage to a subject. Parameters of the subject and the type of image to be produced are provided to the system. X-ray tube voltage and current are initialized at a fraction of conventional values for a portion of a subject to be imaged. An image is then created and transformed. A power ratio of low frequency components to high frequency components is calculated indicating quality of the image. Images are produced and adjusted until the maximum exposure is reached, or the power ratio does not increase beyond a quality increment. The process is repeated to optimize X-ray tube voltage. The X-ray fluoroscopy procedure is performed with the optimum X-ray tube photon count and the optimum voltage thereby reducing X-ray dosage. The optimization is repeated periodically to readjust the system.
    Type: Grant
    Filed: October 5, 1992
    Date of Patent: March 8, 1994
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Aiman A. Abdel-Malek, John J. Bloomer
  • Patent number: 5291431
    Abstract: An array multiplier using modified Booth encoding of multiplier input signals is formed on the surface of a monolithic integrated circuit using masks generated by a computer, in accordance with a silicon compiler program, by arranging an array of standard cells selected from a library of standard cell designs in a tessellation procedure. The array multiplier is laid out in accordance with one of particular tessellation patterns, which employ simpler and more regular patterns of interconnections between cells. Carry-save addition is used in combining partial product terms to avoid concatenating long ripple carry times.
    Type: Grant
    Filed: October 22, 1992
    Date of Patent: March 1, 1994
    Assignee: General Electric Company
    Inventors: Chung-Yih Ho, Chi-Yuan Chin, Richard I. Hartley, Michael J. Hartman, Kenneth B. Welles, II
  • Patent number: 5187754
    Abstract: A method for generating a composite terrain map, proceeding from an overview taken at relatively high altitude and photographs taken at relatively low altitudes, generates a composite terrain map that is relatively free of step irradiance variations where the photographs taken at relatively low altitudes are splined. Digitized representations of orthographic projections of the overview and each of the lower-altitude photographs, as regularly sampled in two orthogonal dimensions and referred to a common spatial frame of reference, are generated. The digitized representations of the orthographic projections of each of said photographs taken at relatively low altitudes are hig-pass spatially filtered, to generate digitized high-spatial-frequency responses. The digitized high-spatial-frequency responses are splined to generate a digitized high-spatial-frequency response for the composite terrain map.
    Type: Grant
    Filed: April 30, 1991
    Date of Patent: February 16, 1993
    Assignee: General Electric Company
    Inventors: Bena L. Currin, Aiman A. Abdel-Malek, Richard I. Hartley
  • Patent number: 5177691
    Abstract: The invention is embodied in improvements in calculating discrete Fourier transform (DFT) using recursive digital filtering in a method for determining the velocity of a target located in a medium for vibratory energy. In the method a transmitter electrical signal of prescribed frequency is generated. Coherent vibratory energy, the frequency of which is in fixed relationship with said prescribed frequency, is transmitted into the medium and is directed toward the target. The transmitting is done in recurring pulses of prescribed duration. During range gate intervals each of prescribed duration, the transmitted coherent vibratory energy is received from the medium after its interaction with the target. The vibratory energy which is received during the range gate intervals is converted to a receiver electrical signal. The transmitter and receiver electrical signals are mixed together to obtain a demodulated electrical signal through heterodyning or homodyning.
    Type: Grant
    Filed: November 30, 1990
    Date of Patent: January 5, 1993
    Assignee: General Electric Company
    Inventors: Kenneth B. Welles, Richard I. Hartley
  • Patent number: 5175843
    Abstract: A computer-aided design method for restructuring computational networks to minimize latency and shim delay, suitable for use by a silicon compiler. Data-flow graphs for computational networks which use trees of operators, each performing associative and commutative combining of its respective imput operands to generate a respective output operand, are converted to data-flow graphs with multiple-input operators. Data-flow graphs with multiple-input operators, after being optimally scheduled, are converted to data-flow graphs which use trees of dual-input operators or of dual-input and three-input operators, those trees having minimum latency and shim delay associated with them. These data-flow graphs then have shim delay minimized in them, e.g. by being subjected to linear programming.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: December 29, 1992
    Assignee: General Electric Company
    Inventors: Albert E. Casavant, Richard I. Hartley
  • Patent number: 5164724
    Abstract: Conversion apparatus is used to convert digital data words to a digit-serial data format wherein digit bit-width is optimal for subsequent processing of the digital data words. Optimization is with regard to throughput efficiency, a measure of integrated circuit performance proportional to throughput rate of integrated circuitry and inversely proportional to the area of that integrated circuitry, comprising processing circuitry and attendant conversion circuitry.
    Type: Grant
    Filed: July 16, 1990
    Date of Patent: November 17, 1992
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Peter F. Corbett, Fathy F. Yassa, Sharbel E. Noujaim
  • Patent number: 5159598
    Abstract: An auxiliary monolithic integrated circuit chip provides both buffer amplification and testing interfaces. Off-the-shelf monolithic integrated circuit chips can be connected into an electronics system using one of these auxiliary buffer chips before each input port and after each output port, to implement functional testing similar to that done on monolithic integrated circuit chips with built-in test circuitry.
    Type: Grant
    Filed: May 3, 1990
    Date of Patent: October 27, 1992
    Assignee: General Electric Company
    Inventors: Kenneth B. Welles, II, Paul A. Delano, Richard I. Hartley, Michael J. Hartman, Abhijit Chatterjee
  • Patent number: 5119378
    Abstract: Built-in test circuitry, which is appropriate for monolithic integrated circuit chips that are to be connected in a plural-chip package, uses electronic token passing to select one of the test input ports in the circuitry to be tested for application of test input vectors. The built-in test circuitry also uses electronic token passing to select one of the test output ports in the circuitry to be tested from which test results are to be supplied. Methods for testing based on these token passing procedures are described.
    Type: Grant
    Filed: April 24, 1990
    Date of Patent: June 2, 1992
    Assignee: General Electric Company
    Inventors: Kenneth B. Welles, II, Richard I. Hartley, Michael J. Hartman, Paul A. Delano
  • Patent number: 5115437
    Abstract: Built-in test circuitry, which is appropriate for monolithic integrated circuit chips that are to be connected in a plural-chip package, uses electronic token passing to select one of the test input ports in the circuitry to be tested for application of test input vectors. The built-in test circuitry also uses electronic token passing to select one of the test output ports in the circuitry to be tested from which test results are to be supplied.
    Type: Grant
    Filed: March 2, 1990
    Date of Patent: May 19, 1992
    Assignee: General Electric Company
    Inventors: Kenneth B. Welles, II, Richard I. Hartley, Michael J. Hartman
  • Patent number: 5084834
    Abstract: Linear combining apparatus for digit-serial data performs addition, subtraction and comparison functions on a systolic basis. Signals are afforded the apparatus indicating the occurence of the most significant digits of the digit-serial signals being linearly combined.
    Type: Grant
    Filed: January 22, 1991
    Date of Patent: January 28, 1992
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Peter F. Corbett
  • Patent number: 5034908
    Abstract: One type of transversal filter using digit-serial signals in its operation comprises a to-digit-serial converter for converting a succession of input data words received at its input port each to a respective succession of m-bit-wide digits supplied from its output port in order of progressively greater significance, m being a positive plural integer; a clocked delay line having an input tap connected for responding to the m-bit-wide digits supplied from the output port of the to-digit-serial converter and having at least one further tap for supplying a respective tap signal; and means for performing a weighted summation of the input signal to the clocked delay line and each tap signal from the clocked delay line, to generate a filter response in digit-serial format.
    Type: Grant
    Filed: April 2, 1990
    Date of Patent: July 23, 1991
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Peter F. Corbett, Fathy F. Yassa, Sharbel E. Noujaim
  • Patent number: 5034909
    Abstract: A recursive digital filter for digit-serial signals comprises a digit-serial adder having an augend input port to which successions of m-bit-wide digits of a digital-serial filter input signal are supplied in order of progressively greater significance, having at least a first addend input port, and having a sum output port; digit-serial multiplier apparatus having a multiplicand input port connected from the sum output port of said digit-serial adder and having a product output port for supplying a weighted response to signal received at its multiplicand input port; and means for applying the weighted response to the first addend input port of the digit-serial adder so as to be in word alignment with the digit-serial input signal to the augend input port of the digit-serial adder.
    Type: Grant
    Filed: February 28, 1990
    Date of Patent: July 23, 1991
    Assignee: General Electric Company
    Inventor: Richard I. Hartley