Patents by Inventor Richard J. Rassel

Richard J. Rassel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9759868
    Abstract: The disclosure relates to semiconductor structures and, more particularly, to structures for preventing dicing damage on photonics wafers. The structure includes: an optical waveguide structure to optical fiber interface formed on an integrated circuit; and a groove formed in a substrate and which includes a structure preventing a fluid pressure of a dicing operation from damaging the substrate along the groove.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: September 12, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brett Cucci, Paul F. Fortier, Jeffrey P. Gambino, Robert K. Leidy, Qizhi Liu, Richard J. Rassel
  • Publication number: 20170131477
    Abstract: The disclosure relates to semiconductor structures and, more particularly, to structures for preventing dicing damage on photonics wafers. The structure includes: an optical waveguide structure to optical fiber interface formed on an integrated circuit; and a groove formed in a substrate and which includes a structure preventing a fluid pressure of a dicing operation from damaging the substrate along the groove.
    Type: Application
    Filed: November 5, 2015
    Publication date: May 11, 2017
    Inventors: Brett CUCCI, Paul F. FORTIER, Jeffrey P. GAMBINO, Robert K. LEIDY, Qizhi LIU, Richard J. RASSEL
  • Patent number: 9106854
    Abstract: A reference pixel sensor cell (e.g., global shutter) with hold node for leakage cancellation, methods of manufacture and design structure is provided. A pixel array includes one or more reference pixel sensor cells dispersed locally throughout active light sensing regions. The one or more reference pixel sensor cells provides a reference signal used to correct for photon generated leakage signals which vary by locality within the active light sensing regions.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: August 11, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Richard J. Rassel
  • Publication number: 20150221698
    Abstract: Disclosed herein a method, including depositing a silicon nitride layer over an inter layer dielectric (ILD); depositing a first conductive layer having a first thickness; forming a mask over a first portion of the first conductive layer to expose a second portion of the first conductive layer; etching the first conductive layer; etching the silicon nitride layer with a fluorine-based etch; and depositing a second conductive layer having a second thickness.
    Type: Application
    Filed: April 16, 2015
    Publication date: August 6, 2015
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 9059360
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 9059180
    Abstract: Disclosed herein an image sensor chip, including a substrate having at least one via extending through at least one inter layer dielectric (ILD); a first conductive layer over the ILD, wherein the first conductive layer has a first thickness; a second conductive layer over the first conductive layer, wherein the second conductive layer has a second thickness of less than the first thickness; a polymer layer over the second conductive layer, the polymer layer including a cavity; a plurality of cavity components in the cavity; and protective layer contacting the polymer layer and covering the cavity.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Publication number: 20140340548
    Abstract: A reference pixel sensor cell (e.g., global shutter) with hold node for leakage cancellation, methods of manufacture and design structure is provided. A pixel array includes one or more reference pixel sensor cells dispersed locally throughout active light sensing regions. The one or more reference pixel sensor cells provides a reference signal used to correct for photon generated leakage signals which vary by locality within the active light sensing regions.
    Type: Application
    Filed: August 1, 2014
    Publication date: November 20, 2014
    Inventors: James W. ADKISSON, John J. ELLIS-MONAGHAN, Richard J. RASSEL
  • Patent number: 8836835
    Abstract: A reference pixel sensor cell (e.g., global shutter) with hold node for leakage cancellation, methods of manufacture and design structure is provided. A pixel array includes one or more reference pixel sensor cells dispersed locally throughout active light sensing regions. The one or more reference pixel sensor cells provides a reference signal used to correct for photon generated leakage signals which vary by locality within the active light sensing regions.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Richard J. Rassel
  • Publication number: 20140209986
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.
    Type: Application
    Filed: March 31, 2014
    Publication date: July 31, 2014
    Applicant: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 8753917
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 8709855
    Abstract: A conductive light shield is formed over a first dielectric layer of a via level in a metal interconnect structure. The conductive light shield is covers a floating drain of an image sensor pixel cell. A second dielectric layer is formed over the conductive light shield and at least one via extending from a top surface of the second dielectric layer to a bottom surface of the first dielectric layer is formed in the metal interconnect structure. The conductive light shield may be formed within a contact level between a top surface of a semiconductor substrate and a first metal line level, or may be formed in any metal interconnect via level between two metal line levels. The inventive image sensor pixel cell is less prone to noise due to the blockage of light over the floating drain by the conductive light shield.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: April 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Zhong-Xiang He, Kevin N. Ogg, Richard J. Rassel, Robert M. Rassel
  • Patent number: 8704325
    Abstract: CMOS pixel sensors with multiple pixel sizes and methods of manufacturing the CMOS pixel sensors with implant dose control are provided. The method includes forming a plurality of pixel sensors in a same substrate and forming a masking pattern over at least one of the plurality of pixel sensors that has a pixel size larger than a non-masked pixel sensor of the plurality of pixel sensors. The method further includes providing a single dosage implant to the plurality of pixel sensors. The at least one of the plurality of pixel sensors with the masking pattern receives a lower dosage than the non-masked pixel sensor.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 22, 2014
    Assignee: International Business Machines Corporation
    Inventors: John J. Ellis-Monaghan, Jeffery P. Gambino, Daniel N. Maynard, Richard J. Rassel
  • Patent number: 8618588
    Abstract: A method of preventing blooming in a pixel array includes affecting an amount of light that impinges on a photoelectric conversion element by adjusting a transmissivity of an electrochromic element based on an output of the photoelectric conversion element.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: December 31, 2013
    Assignee: International Business Machines Corporation
    Inventors: Kristin M. Ackerson, Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Richard J. Rassel, Robert M. Rassel
  • Patent number: 8450822
    Abstract: Disclosed herein an image sensor chip, including a substrate having at least one via extending through at least one inter layer dielectric (ILD); a first conductive layer over the ILD, wherein the first conductive layer has a first thickness; a second conductive layer over the first conductive layer, wherein the second conductive layer has a second thickness of less than the first thickness; a polymer layer over the second conductive layer, the polymer layer including a cavity; a plurality of cavity components in the cavity; and an optically transparent layer contacting the polymer layer and covering the cavity.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: May 28, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
  • Patent number: 8409899
    Abstract: A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: April 2, 2013
    Assignee: Intnernational Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Mark D. Jaffe, Robert K. Leidy, Charles F. Musante, Richard J. Rassel
  • Patent number: 8405751
    Abstract: A pixel structure for an image sensor includes a semiconductor material portion having a coplanar and contiguous semiconductor surface and including four photodiodes, four channel regions, and a common floating diffusion region. Each of the four channel regions is directly adjoined to one of the four photodiodes and the common floating diffusion region. The four photodiodes are located within four different quadrants as defined employing a vertical line passing through a point within the common floating diffusion region as a center axis. The common floating diffusion region, a reset gate transistor, a source follower transistor, and a row select transistor are located within four different quadrants as defined employing a vertical line passing through a point within one of the photodiodes as an axis.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: March 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jason D. Hibbeler, Daniel N. Maynard, Kevin N. Ogg, Richard J. Rassel
  • Publication number: 20130001732
    Abstract: CMOS pixel sensors with multiple pixel sizes and methods of manufacturing the CMOS pixel sensors with implant dose control are provided. The method includes forming a plurality of pixel sensors in a same substrate and forming a masking pattern over at least one of the plurality of pixel sensors that has a pixel size larger than a non-masked pixel sensor of the plurality of pixel sensors. The method further includes providing a single dosage implant to the plurality of pixel sensors. The at least one of the plurality of pixel sensors with the masking pattern receives a lower dosage than the non-masked pixel sensor.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John J. ELLIS-MONAGHAN, Jeffery P. GAMBINO, Daniel N. MAYNARD, Richard J. RASSEL
  • Patent number: 8334195
    Abstract: CMOS pixel sensors with multiple pixel sizes and methods of manufacturing the CMOS pixel sensors with implant dose control are provided. The method includes forming a plurality of pixel sensors in a same substrate and forming a masking pattern over at least one of the plurality of pixel sensors that has a pixel size larger than a non-masked pixel sensor of the plurality of pixel sensors. The method further includes providing a single dosage implant to the plurality of pixel sensors. The at least one of the plurality of pixel sensors with the masking pattern receives a lower dosage than the non-masked pixel sensor.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: December 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: John J. Ellis-Monaghan, Jeffrey P. Gambino, Daniel N. Maynard, Richard J. Rassel
  • Patent number: 8298853
    Abstract: CMOS pixel sensor cells with spacer transfer gates and methods of manufacture are provided herein. The method includes forming a middle gate structure on a gate dielectric. The method further includes forming insulation sidewalls on the middle gate structure. The method further includes forming spacer transfer gates on the gate dielectric on opposing sides of the middle gate, adjacent to the insulation sidewalls which isolate the middle gate structure from the spacer transfer gates. The method further includes forming a photo-diode region in electrical contact with one of the spacer transfer gates and a floating diffusion in electrical contact with another of the spacer transfer gates.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John J. Ellis-Monaghan, Rajendran Krishnasamy, Solomon Mulugeta, Charles F. Musante, Richard J. Rassel
  • Patent number: 8299475
    Abstract: A CMOS image sensor pixel includes a conductive light shield, which is located between a first dielectric layer and a second dielectric layer. At least one via extends from a top surface of the second dielectric layer to a bottom surface of the first dielectric layer is formed in the metal interconnect structure. The conductive light shield may be formed within a contact level between a top surface of a semiconductor substrate and a first metal line level, or may be formed in any metal interconnect via level between two metal line levels. The inventive CMOS image sensor pixel enables reduction of noise in the signal stored in the floating drain.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Zhong-Xiang He, Kevin N. Ogg, Richard J. Rassel, Robert M. Rassel