Patents by Inventor Richard L. Wallace
Richard L. Wallace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240071913Abstract: An integrated circuit structure includes a first interconnect layer, and a second interconnect layer above the first interconnect layer. The first interconnect layer includes a first interconnect feature and a second interconnect feature. The second interconnect layer includes a third interconnect feature, a fourth interconnect feature, and a fifth interconnection feature. The third interconnect feature extends from an upper surface of the first interconnect feature to an upper surface of the second interconnect layer. In an example, the fourth interconnect feature extends from an upper surface of the second interconnect feature to below the upper surface of the second interconnect layer, and the fifth interconnect feature extends from an upper surface of the fourth interconnect feature to the upper surface of the second interconnect layer. Thus, a double-decked vertical stack of interconnect features is formed using the fourth interconnect feature within the second interconnect layer.Type: ApplicationFiled: August 24, 2022Publication date: February 29, 2024Applicant: Intel CorporationInventors: June Choi, Richard Schenker, Charles H. Wallace, Nikhil J. Mehta, Clifford L. Ong
-
Publication number: 20240071917Abstract: Advanced lithography techniques including sub-10 nm pitch patterning and structures resulting therefrom are described. Self-assembled devices and their methods of fabrication are described.Type: ApplicationFiled: October 27, 2023Publication date: February 29, 2024Inventors: Richard E. SCHENKER, Robert L. BRISTOL, Kevin L. LIN, Florian GSTREIN, James M. BLACKWELL, Marie KRYSAK, Manish CHANDHOK, Paul A. NYHUS, Charles H. WALLACE, Curtis W. WARD, Swaminathan SIVAKUMAR, Elliot N. TAN
-
Patent number: 10633765Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90° C., and even as small as 50° C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100° C.Type: GrantFiled: April 28, 2016Date of Patent: April 28, 2020Assignee: 1366 TECHNOLOGIES, INC.Inventors: Ralf Jonczyk, Richard L Wallace, David S Harvey
-
Patent number: 10072351Abstract: Semi-conductor wafers with thin and thicker regions at controlled locations may be for Photovoltaics. The interior may be less than 180 microns or thinner, to 50 microns, with a thicker portion, at 180-250 microns. Thin wafers have higher efficiency. A thicker perimeter provides handling strength. Thicker stripes, landings and islands are for metallization coupling. Wafers may be made directly from a melt upon a template with regions of different heat extraction propensity arranged to correspond to locations of relative thicknesses. Interstitial oxygen is less than 6×1017 atoms/cc, preferably less than 2×1017, total oxygen less than 8.75×1017 atoms/cc, preferably less than 5.25×1017. Thicker regions form adjacent template regions having relatively higher heat extraction propensity; thinner regions adjacent regions with lesser extraction propensity. Thicker template regions have higher extraction propensity. Functional materials upon the template also have differing extraction propensities.Type: GrantFiled: April 17, 2015Date of Patent: September 11, 2018Assignee: 1366 Technologies, Inc.Inventors: Emanuel M. Sachs, Ralf Jonczyk, Adam L. Lorenz, Richard L. Wallace, G. D. Stephen Hudelson
-
Publication number: 20180119309Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90° C., and even as small as 50° C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100° C.Type: ApplicationFiled: April 28, 2016Publication date: May 3, 2018Applicant: 1366 TECHNOLOGIES, INC.Inventors: RALF JONCZYK, RICHARD L WALLACE, DAVID S HARVEY
-
Publication number: 20180019365Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant can not enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.Type: ApplicationFiled: October 14, 2015Publication date: January 18, 2018Applicant: 1366 TECHNOLOGIES, INC.Inventors: RALF JONCZYK, KERNAN D BRIAN, G.D. STEPHEN HUDELSON, RICHARD L. WALLACE, ADAM M LORENZ
-
Patent number: 9643342Abstract: A pressure differential can be applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential can allow release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted through the thickness of the forming wafer. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet can allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: GrantFiled: April 11, 2014Date of Patent: May 9, 2017Assignee: 1366 Technologies, Inc.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
-
Publication number: 20170051429Abstract: Semi-conductor wafers with thin and thicker regions at controlled locations may be for Photovoltaics. The interior may be less than 180 microns or thinner, to 50 microns, with a thicker portion, at 180-250 microns. Thin wafers have higher efficiency. A thicker perimeter provides handling strength. Thicker stripes, landings and islands are for metallization coupling. Wafers may be made directly from a melt upon a template with regions of different heat extraction propensity arranged to correspond to locations of relative thicknesses. Interstitial oxygen is less than 6×1017 atoms/cc, preferably less than 2×1017, total oxygen less than 8.75×1017 atoms/cc, preferably less than 5.25×1017. Thicker regions form adjacent template regions having relatively higher heat extraction propensity; thinner regions adjacent regions with lesser extraction propensity. Thicker template regions have higher extraction propensity. Functional materials upon the template also have differing extraction propensities.Type: ApplicationFiled: April 17, 2015Publication date: February 23, 2017Applicant: 1366 TECHNOLOGIES, INC.Inventors: EMANUEL M. SACHS, RALF JONCZYK, ADAM L. LORENZ, RICHARD L. WALLACE, G.D. STEPHEN HUDELSON
-
Publication number: 20140220171Abstract: A pressure differential can be applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential can allow release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted through the thickness of the forming wafer. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet can allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: ApplicationFiled: April 11, 2014Publication date: August 7, 2014Applicant: 1366 TECHNOLOGIES, INC.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G.D. Stephen Hudelson, Ralf Jonczyk
-
Patent number: 8696810Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: GrantFiled: October 18, 2012Date of Patent: April 15, 2014Assignee: 1366 Technologies, Inc.Inventors: Eerik T. Hantsoo, G. D. Stephen Hudelson, Ralf Jonczyk, Adam M. Lorenz, Emanuel M. Sachs, Richard L. Wallace
-
Publication number: 20140083349Abstract: A ribbon crystal pulling furnace has a base insulation and a liner insulation removably connected to the base insulation. At least a portion of the liner insulation forms an interior for containing a crucible.Type: ApplicationFiled: September 21, 2012Publication date: March 27, 2014Applicant: MAX ERA, INC.Inventors: Richard L. WALLACE, David HARVEY, Weidong HUANG, Scott REITSMA, Christine RICHARDSON
-
Patent number: 8628992Abstract: Methods exploiting a Self Aligned Cell (SAC) architecture for doping purposes, use the architecture to direct the deposition and application of either a dopant or a diffusion retarder. Doping is provided in regions that will become metallization for conducting fingers. Dopant may be treated directly into metallization grooves. Or, diffusion retarder may be provided in non-groove locations, and dopant may be provided over some or all of the entire wafer surface. Dopant and metal automatically go where desired, and in register with each other. The SAC architecture also includes concave surfaces for light absorbing regions of a cell, to reduce reflection of light energy, which regions may also be treated with dopant in the concavities, to result in semi-conductor emitter lines. Alternatively, diffusion retarder may be treated into the concavities, leaving upper tips of ridges between the concavities exposed, thereby subject to deeper doping.Type: GrantFiled: April 17, 2009Date of Patent: January 14, 2014Assignee: 1366 Technologies, Inc.Inventors: Andrew M. Gabor, Richard L. Wallace
-
Patent number: 8293009Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: GrantFiled: November 17, 2011Date of Patent: October 23, 2012Assignee: 1366 Technologies Inc.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
-
Publication number: 20120067273Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: ApplicationFiled: November 17, 2011Publication date: March 22, 2012Applicant: 1366 TECHNOLOGIES INC.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
-
Publication number: 20120038031Abstract: Materials that contain liquid are deposited into grooves upon a surface of a work piece, such as a silicon wafer to form a solar cell. Liquid can be dispensed into work piece paths, such as grooves under pressure through a dispensing tube. The tube mechanically tracks in the groove. The tube may be small and rest at the groove bottom, with the sidewalls providing restraint. Or it may be larger and ride on the top edges of the groove. A tracking feature, such as a protrusion, Non-circular cross-sections, molded-on protrusions and lobes also enhance tracking. The tube may be forced against the groove by spring or magnetic loading. Alignment guides, such as lead-in features may guide the tube into the groove. Restoring features along the path may restore a wayward tube. Many tubes may be used. Many work pieces can be treated in a line or on a drum.Type: ApplicationFiled: January 6, 2010Publication date: February 16, 2012Applicant: 1366 TECHNOLOGIES INC.Inventors: Emanuel M. Sachs, Richard L. Wallace, James F. Bredt, Benjamin F. Polito, Ali Ersen
-
Publication number: 20110247546Abstract: A ribbon crystal has a body with a width dimension, and string embedded within the body. The string has a generally elongated cross-sectional shape. This cross-section (of the string) has a generally longitudinal axis that diverges with the width dimension of the ribbon crystal body.Type: ApplicationFiled: April 5, 2011Publication date: October 13, 2011Applicant: EVERGREEN SOLAR, INC.Inventors: Christine Richardson, Weidong Huang, Richard L. Wallace, Daniel Doble, Scott Reitsma
-
Publication number: 20110247549Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: ApplicationFiled: March 9, 2010Publication date: October 13, 2011Applicant: 1366 TECHNOLOGIES INC.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
-
Publication number: 20110146782Abstract: Methods exploiting a Self Aligned Cell (SAC) architecture for doping purposes, use the architecture to direct the deposition and application of either a dopant or a diffusion retarder. Doping is provided in regions that will become metallization for conducting fingers. Dopant may be treated directly into metallization grooves. Or, diffusion retarder may be provided in non-groove locations, and dopant may be provided over some or all of the entire wafer surface. Dopant and metal automatically go where desired, and in register with each other. The SAC architecture also includes concave surfaces for light absorbing regions of a cell, to reduce reflection of light energy, which regions may also be treated with dopant in the concavities, to result in semiconductor emitter lines. Alternatively, diffusion retarder may be treated into the concavities, leaving upper tips of ridges between the concavities exposed, thereby subject to deeper doping.Type: ApplicationFiled: April 17, 2009Publication date: June 23, 2011Applicant: 1366 TECHNOLOGIES INC.Inventors: Andrew M. Gabor, Richard L. Wallace
-
Publication number: 20080134964Abstract: A system for producing a crystal formed from a material with impurities has a crucible for containing the material. The crucible has, among other things, a crystal region for forming the crystal, an introduction region for receiving the material, and a removal region for removing a portion of the material. The crucible is configured to produce a generally one directional flow of the material (in liquid form) from the introduction region toward the removal region. This generally one directional flow causes the removal region to have a higher concentration of impurities than the introduction region.Type: ApplicationFiled: April 27, 2007Publication date: June 12, 2008Applicant: Evergreen Solar, Inc.Inventors: David Harvey, Weidong Huang, Richard L. Wallace, Leo van Glabbeek, Emanuel M. Sachs
-
Patent number: 7232484Abstract: Semiconductor materials such as silicon particles are doped by mixing the semiconductor material with a solution having a dopan and a solvent. The solvent is removed from the wetted surface of the particles of the semiconductor material, thereby yielding particles that are substantially free from the solvent and are uniformly coated with the dopant.Type: GrantFiled: November 24, 2004Date of Patent: June 19, 2007Assignee: Evergreen Solar Inc.Inventors: Mary C. Cretella, Richard L. Wallace, Jr.