Patents by Inventor Rick A. Verstraete

Rick A. Verstraete has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4551814
    Abstract: A logic gate structure having functionally redundant architecture for enhanced production yields and reliability comprises a plurality of two-input nodes at least some of which may be programmed by control states for changing the logical function of the gate structure. Redundancy is provided by gate structure implementations in which the number of possible control states exceed the number of logic functions expected of the gate structure. Redundancy increases the probability of gate structure operation despite logic faults and renders the gate structure suitable for use in adaptable problem solving machines such as robots and pattern recognition apparatus.A number of embodiments are disclosed including three and four input variable networks. Some such embodiments include selected architectural simplifications wherein certain nodes in a network are either logically fixed or entirely omitted to reduce the number of control lines.
    Type: Grant
    Filed: December 12, 1983
    Date of Patent: November 5, 1985
    Assignee: Aerojet-General Corporation
    Inventors: Donald W. Moore, Rick A. Verstraete
  • Patent number: 4551815
    Abstract: A programmable gate structure having functionally redundant architecture for enhanced production yields and reliability comprises a plurality of two-input nodes at least some of which may be programmed by control states for changing the logical function of the gate structure. Redundancy is provided by gate structure implementations in which the number of possible control states exceed the number of logic functions expected of the gate structure. Redundancy increases the probability of gate structure operation despite logic faults and renders the gate structure suitable for reprogramming in response to detected faults to achieve a desired gate function.A number of embodiments are disclosed including selected architectural simplifications wherein certain nodes in a network are logically fixed to reduce the number of control lines. Illustrative computer programs for generating the proper control line signals for a selected gate function in such embodiments are disclosed.
    Type: Grant
    Filed: March 15, 1984
    Date of Patent: November 5, 1985
    Assignee: Aerojet-General Corporation
    Inventors: Donald W. Moore, Rick A. Verstraete