Abstract: An apparatus that includes a semiconductor substrate in a first layer, the semiconductor substrate being divided, at least in part, into a memory cell array region, a peripheral circuit region and a contact plug region between the memory cell array region and the peripheral circuit region; a plurality of word lines embedded in the semiconductor substrate and extending in parallel across the memory cell array region and the contact plug region; a nitride film in a second layer above the first layer, the nitride film covering the memory cell array region and the contact plug region; an oxide film in the second layer, the oxide film covering the peripheral circuit region; and a plurality of contact plugs in the nitride film above the contact plug region to be connected to the plurality of word lines, respectively.