Patents by Inventor Rikihiro Maruyama
Rikihiro Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11626358Abstract: A semiconductor device, including a circuit pattern, a contact part and an external connection terminal. The contact part has a cylindrical through-hole and first and second opening ends opposite to each other, the second opening end being joined to the circuit pattern. The external connection terminal has a prismatic main body portion and first and second end portions, the second end portion being inserted into the through-hole from the first opening end of the contact part. The main body portion of the external connection terminal has an insertion prevented portion formed thereon. The contact part includes an insertion preventing portion formed on an inner circumferential surface of the through-hole, the insertion preventing portion being so positioned as to be substantially downstream, with respect to an insertion direction of the external connection terminal, from the main body portion of the external connection terminal inserted into the through-hole.Type: GrantFiled: March 26, 2021Date of Patent: April 11, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Seiichi Takahashi
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Publication number: 20230014848Abstract: A semiconductor device includes first semiconductor chips that each include a first control electrode and a first output electrode, second semiconductor chips each include a second control electrode and a second output electrode, first and second input circuit patterns on which the first and second input electrodes are disposed, respectively, first and second control circuit patterns electrically connected to the first and second control electrodes, respectively, first and second resistive elements, and a first inter-board wiring member. The first control electrodes and first resistive element are electrically connected via the first control circuit pattern, the second control electrodes and second resistive element are electrically connected via the second control circuit pattern, and at least one of the first output electrodes and at least one of the second output electrodes are electrically connected to each other via the first inter-board wiring member.Type: ApplicationFiled: May 31, 2022Publication date: January 19, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Norihiro KOMIYAMA, Kunio KOBAYASHI, Yuto KOBAYASHI, Takahito HARADA, Hirohisa OYAMA, Masahiro SASAKI, Ryousuke USUI
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Publication number: 20220208685Abstract: A circuit pattern, which is a second negative electrode wiring, and a horizontally extending area of a circuit pattern, which is a first negative electrode wiring, are connected electrically and mechanically by a vertically extending area of the circuit pattern and wires, which are an inter-negative-electrode wiring. As a result, N terminals and N1 terminals are equal in potential in a semiconductor device. The N terminals of a converter circuit section and the N1 terminals of an inverter circuit section are electrically connected to make the N terminals and the N1 terminals equal in potential.Type: ApplicationFiled: October 29, 2021Publication date: June 30, 2022Applicant: FUJI ELECTRIC CO., LTD.Inventors: Masaki TAKAHASHI, Kousuke KOMATSU, Rikihiro MARUYAMA
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Patent number: 11337306Abstract: A semiconductor device including an insulated circuit board. The insulated circuit board includes an insulating board having an outer edge and a plurality of corners, and a plurality of circuit patterns formed on a front surface of the insulating board. The plurality of circuit patterns have a plurality of outer-edge corners facing the outer edge of the insulating board, among which outer-edge corners corresponding to the corners of the insulating board are smaller in curvature than outer-edge corners that do not correspond to the corners of the insulating board.Type: GrantFiled: December 28, 2020Date of Patent: May 17, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kenshi Kai, Rikihiro Maruyama
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Patent number: 11295997Abstract: A method of manufacturing a semiconductor device prepares contact members, each of which has a cylindrical through-hole, and column-shaped connection terminals, each having a polygonal shape in a cross-sectional view along a length direction thereof, wherein a length of a diagonal of the polygonal shape is greater than an inner diameter of the through-holes. Chamfers with a curvature for fitting an inner surface of the through-holes are formed at corners of the connection terminal, and the connection terminals are press-fitted into the through-holes of the contacts. By doing so, the area of contact where the connection terminals press-fitted into the contacts contact the inner circumferential surfaces of the through-holes of the contacts is increased. This increases the tensile load of the connection terminals fitted into the contacts.Type: GrantFiled: May 26, 2020Date of Patent: April 5, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Masaoki Miyakoshi
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Publication number: 20210375734Abstract: A semiconductor device, including a circuit pattern, a contact part and an external connection terminal. The contact part has a cylindrical through-hole and first and second opening ends opposite to each other, the second opening end being joined to the circuit pattern. The external connection terminal has a prismatic main body portion and first and second end portions, the second end portion being inserted into the through-hole from the first opening end of the contact part. The main body portion of the external connection terminal has an insertion prevented portion formed thereon. The contact part includes an insertion preventing portion formed on an inner circumferential surface of the through-hole, the insertion preventing portion being so positioned as to be substantially downstream, with respect to an insertion direction of the external connection terminal, from the main body portion of the external connection terminal inserted into the through-hole.Type: ApplicationFiled: March 26, 2021Publication date: December 2, 2021Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Seiichi TAKAHASHI
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Patent number: 11164846Abstract: A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.Type: GrantFiled: December 23, 2019Date of Patent: November 2, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Kenshi Kai, Kazuya Adachi
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Patent number: 11107784Abstract: A semiconductor device includes: a multilayer substrate which includes a circuit board and an insulating plate on which the circuit board is formed; and a contact part having a cylindrical hollow hole therein and an open end bonded to a bonding area on the front surface of the circuit board via bonding material. In the case of this semiconductor device, wettability of a contact area of the contact part with respect to the bonding material is approximately equal to wettability of at least the bonding area of the circuit board with respect to the bonding material. Thus, the rising of the bonding material into the hollow hole of the contact part during heating performed when the contact part is bonded to the circuit board is reduced.Type: GrantFiled: February 25, 2020Date of Patent: August 31, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Masaoki Miyakoshi, Masayuki Soutome, Kazuya Adachi, Takeshi Yokoyama
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Publication number: 20210251075Abstract: A semiconductor device including an insulated circuit board. The insulated circuit board includes an insulating board having an outer edge and a plurality of corners, and a plurality of circuit patterns formed on a front surface of the insulating board. The plurality of circuit patterns have a plurality of outer-edge corners facing the outer edge of the insulating board, among which outer-edge corners corresponding to the corners of the insulating board are smaller in curvature than outer-edge corners that do not correspond to the corners of the insulating board.Type: ApplicationFiled: December 28, 2020Publication date: August 12, 2021Applicant: FUJI ELECTRIC CO., LTD.Inventors: Kenshi KAI, Rikihiro MARUYAMA
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Patent number: 11069643Abstract: A conductive plate has a front surface at a front side and a rear surface at a rear side. The front surface includes a first front surface on which a first arrangement region is disposed and a second front surface on which a second arrangement region is disposed. The first front surface has a height measured from the rear surface that is different from a height of the second front surface measured from the rear surface. Next, first and second bonding materials are respectively applied to the first and second arrangement regions. A first part is bonded to the first arrangement region via the first bonding material, and a second part is bonded to the second arrangement region via the second bonding material. The heights of the first and second arrangement regions set on the front surface on the conductive plate are different from each other.Type: GrantFiled: July 23, 2019Date of Patent: July 20, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kenshi Kai, Rikihiro Maruyama
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Patent number: 10978371Abstract: A semiconductor device including an insulated circuit board on which a semiconductor chip is mounted, and a housing implemented by a plurality of side-walls including at least a first pair of facing side-walls, each of the facing side-walls having joint edges configured to be jointed with the insulated circuit board, and each of the joint edges has an arc-shape such that a center in an extending direction of the joint edge protrudes toward the insulated circuit board more than both ends of the extending direction of the joint edge.Type: GrantFiled: January 22, 2019Date of Patent: April 13, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kenshi Kai, Rikihiro Maruyama, Yoshihiro Miyazaki
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Publication number: 20200328130Abstract: A case of a semiconductor device has sidewall portions which surround sides of a metal substrate along the sides and a coating portion which covers the front surface of the metal substrate surrounded by the sidewall portions and which has through ring holes corresponding to fixing holes. Protrusions are formed on inner surfaces of the sidewall portions opposed to one another in plan view with the ring holes therebetween. The metal substrate is inserted in this way into an area surrounded by the sidewall portions of the case and is reliably fixed. Furthermore, alignment is performed with accuracy between each fixing hole of the metal substrate inserted in this way and its corresponding ring hole of the case.Type: ApplicationFiled: February 26, 2020Publication date: October 15, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventor: Rikihiro MARUYAMA
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Patent number: 10784176Abstract: A case of a semiconductor device has sidewall portions which surround sides of a metal substrate along the sides and a coating portion which covers the front surface of the metal substrate surrounded by the sidewall portions and which has through ring holes corresponding to fixing holes. Protrusions are formed on inner surfaces of the sidewall portions opposed to one another in plan view with the ring holes therebetween. The metal substrate is inserted in this way into an area surrounded by the sidewall portions of the case and is reliably fixed. Furthermore, alignment is performed with accuracy between each fixing hole of the metal substrate inserted in this way and its corresponding ring hole of the case.Type: GrantFiled: February 26, 2020Date of Patent: September 22, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventor: Rikihiro Maruyama
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Publication number: 20200286800Abstract: A method of manufacturing a semiconductor device prepares contact members, each of which has a cylindrical through-hole, and column-shaped connection terminals, each having a polygonal shape in a cross-sectional view along a length direction thereof, wherein a length of a diagonal of the polygonal shape is greater than an inner diameter of the through-holes. Chamfers with a curvature for fitting an inner surface of the through-holes are formed at corners of the connection terminal, and the connection terminals are press-fitted into the through-holes of the contacts. By doing so, the area of contact where the connection terminals press-fitted into the contacts contact the inner circumferential surfaces of the through-holes of the contacts is increased. This increases the tensile load of the connection terminals fitted into the contacts.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Masaoki MIYAKOSHI
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Patent number: 10699994Abstract: In a semiconductor device, protective films are formed on facing side surfaces of a plurality of circuit patterns and a plating process or the like is not performed on parts aside from the side surfaces where the protective films are formed. This means that when semiconductor elements and contact elements are directly bonded via solder onto the plurality of circuit patterns, a drop-in wettability of the plurality of circuit patterns for the solder is avoided.Type: GrantFiled: March 1, 2018Date of Patent: June 30, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kenshi Kai, Rikihiro Maruyama
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Publication number: 20200194392Abstract: A semiconductor device includes: a multilayer substrate which includes a circuit board and an insulating plate on which the circuit board is formed; and a contact part having a cylindrical hollow hole therein and an open end bonded to a bonding area on the front surface of the circuit board via bonding material. In the case of this semiconductor device, wettability of a contact area of the contact part with respect to the bonding material is approximately equal to wettability of at least the bonding area of the circuit board with respect to the bonding material. Thus, the rising of the bonding material into the hollow hole of the contact part during heating performed when the contact part is bonded to the circuit board is reduced.Type: ApplicationFiled: February 25, 2020Publication date: June 18, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Masaoki MIYAKOSHI, Masayuki SOUTOME, Kazuya ADACHI, Takeshi YOKOYAMA
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Publication number: 20200135691Abstract: A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.Type: ApplicationFiled: December 23, 2019Publication date: April 30, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro MARUYAMA, Kenshi KAI, Kazuya ADACHI
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Publication number: 20200098717Abstract: A conductive plate has a front surface at a front side and a rear surface at a rear side. The front surface includes a first front surface on which a first arrangement region is disposed and a second front surface on which a second arrangement region is disposed. The first front surface has a height measured from the rear surface that is different from a height of the second front surface measured from the rear surface. Next, first and second bonding materials are respectively applied to the first and second arrangement regions. A first part is bonded to the first arrangement region via the first bonding material, and a second part is bonded to the second arrangement region via the second bonding material. The heights of the first and second arrangement regions set on the front surface on the conductive plate are different from each other.Type: ApplicationFiled: July 23, 2019Publication date: March 26, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Kenshi KAI, Rikihiro MARUYAMA
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Patent number: 10566308Abstract: A semiconductor device manufacturing method includes: applying solder to an arrangement area of a substrate, the substrate having a connection area to which a wiring member is to be directly connected, the connection area neighboring the arrangement area; arranging a component on the arrangement area via the solder; and soldering the component to the arrangement area by heating the solder while covering the connection area. A soldering support jig includes a columnar covering member having a covering surface at a bottom of the columnar covering member.Type: GrantFiled: June 26, 2018Date of Patent: February 18, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Rikihiro Maruyama, Kenshi Kai, Kazuya Adachi
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Patent number: 10424522Abstract: A case and a semiconductor device including the case are provided for solving the following issues: when fixing a lid body to a case body by an adhesive, a process of attaching the lid body to the case body by applying the adhesive and curing the adhesive by heating is necessary, which requires much labor; also, when fixing the lid body to the case body by an engaging claw, it still requires much labor due to forming the engaging claw. The case includes a first member and a second member that is engaged with the first member to form an accommodation space inside the case, and the first member has a protruding portion extending from the first member side toward the second member side and having an end portion crushed from the opposite side of the first member to fix the second member to the first member.Type: GrantFiled: February 26, 2018Date of Patent: September 24, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventor: Rikihiro Maruyama