Abstract: Circuitry external of a microprocessor determines priority between different peripheral devices requesting interrupts to generate a restart vector and a signal granting priority to one of the interrupt-requesting devices. The peripheral device loads its status and address into two addressable registers connected to a common system bus. The restart vector is loaded into the instruction register of the microprocessor. The microprocessor treats the restart vector as an instruction to store the contents of the program counter in memory and loads certain bits of the restart vector into the program counter. These bits represent the starting address of a subroutine of eight instructions for analyzing the interrupt. An interrupt is recognized and the status and identification of the interrupting device is stored in a single instruction cycle. On the next instruction cycle the first instruction of the interrupt analysis routine may begin.