Patents by Inventor Robert J. Gove

Robert J. Gove has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190180072
    Abstract: An optical sensor device includes: a display layer, comprising a light source configured to generate light incident on an input surface of the optical sensor device; an image sensor layer, disposed below the display layer, comprising an optical image sensor having a plurality of image sensor pixels; and a first ambient light filter layer, disposed between the display layer and the image sensor layer, configured to block one or more wavelengths of light.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 13, 2019
    Inventors: Arash Akhavan Fomani, Marek Mienko, Richard Klenkler, Patrick Smith, Robert J. Gove, Guozhong Shen, Alvin Jee, Young Seen Lee, Jason Goodelle, Bob Lee Mackey
  • Publication number: 20190122025
    Abstract: An optical imaging device for imaging a biometric input object is disclosed. The optical sensor includes an array of sensing elements. The optical sensor is configured to read a subset of sensing elements in the array of sensing elements; analyze the reading of the subset of sensing element to determine if one or more sensing elements of the subset is saturated; alter an operating point of the optical imaging device; and image the input object.
    Type: Application
    Filed: October 20, 2017
    Publication date: April 25, 2019
    Inventors: Robert J. GOVE, Alvin JEE
  • Patent number: 7095448
    Abstract: An image processing circuit compares a pixel value to a threshold value and modifies the pixel value if the pixel value has a predetermined relationship to the threshold value. Alternatively, the image processing circuit generates a random number and combines the random number with a pixel value. Such image processing circuits can be used to remove artifacts such as contour artifacts from a decoded electronic image or a sequence of decoded video frames.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: August 22, 2006
    Assignee: Equator Technologies, Inc.
    Inventors: Qinggang Zhou, Robert J. Gove
  • Patent number: 6948050
    Abstract: A single integrated circuit includes first and second data processors operating on different instruction sets independently operating on disjoint programs and data. The single integrated circuit preferably includes an external interface, a shared data transfer controller and shared memory divided into plural independently accessible memory banks. The two data processors are preferably a digital signal processor (DSP) and a reduced instruction set computer (RISC) processor. The DSP and RISC processors are suitably programmed to perform differing aspects of computer image processing.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: September 20, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Robert J. Gove, Keith Balmer, Nicholas Kerin Ing-Simmons, Karl Marion Guttag
  • Patent number: 6498816
    Abstract: A video processing circuit includes a processor that receives encoded images each having respective first and second regions and that receives a motion vector of the first region of a first one of the images. If the motion vector points to the second region of an image, the processor re-encodes at least a portion of the first region of the first image such that the first region of the first image has no motion vector that points to the second region of an image.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: December 24, 2002
    Assignee: Equator Technologies, Inc.
    Inventors: Venkat V. Easwar, John S. O'Donnell, Ramachandran Natarajan, Robert J. Gove
  • Patent number: 6362835
    Abstract: A method and system for adjusting the brightness and contrast of a digital pulse-width modulated display without scaling the input image data. Brightness is adjusted by changing the duty cycle of a displayed pixel either by altering the bit display durations, or by turning the pixel on during blanking periods 36. The contrast ratio may be altered by changing the display duration of at least one of the MSBs differently than the display duration of at least one of the LSBs. Contrast may be increased by extending the MSB display periods 50 and shortening the LSB display periods 52. Contrast may be decreased by shortening the MSB display periods 56 and extending the LSB display periods 58. The color tint of the displayed image may be altered by individually changing the brightness of the constituent colors.
    Type: Grant
    Filed: November 23, 1993
    Date of Patent: March 26, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Paul M. Urbanus, Robert J. Gove
  • Publication number: 20020001416
    Abstract: An image processing circuit compares a pixel value to a threshold value and modifies the pixel value if the pixel value has a predetermined relationship to the threshold value. Alternatively, the image processing circuit generates a random number and combines the random number with a pixel value. Such image processing circuits can be used to remove artifacts such as contour artifacts from a decoded electronic image or a sequence of decoded video frames.
    Type: Application
    Filed: December 21, 2000
    Publication date: January 3, 2002
    Applicant: Equator Technologies, Inc.
    Inventors: Qinggang Zhou, Robert J. Gove
  • Patent number: 6300924
    Abstract: An SLM-based video receiver (10) receives a video input of some standardized format at a signal interface unit (11) and passes the input to a processor (12). The processor (12) performs analog-to-digital conversion if the pixel data is analog and also performs other enhancements to prepare the pixel data for loading into a video memory (14). The pixel data from the processor (12), representing a field of pixel data, is stored into the memory (14) for loading into rows of pixel elements of a spatial light modulator (16). The spatial light modulator (16) receives the pixel data in rows and each individual pixel element responds accordingly. The pixel elements of the spatial light modulator (16) emit light or reflect light from a source (18) and generate a video frame for display on a screen (20). By exploiting the addressing functions of the spatial light modulator (16), the SLM-based video receiver (10) displays a video frame using a field of pixel data.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: October 9, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Vishal Markandey, Stephen W. Marshall, Donald B. Doherty, Venkat V. Easwar, Paul M. Urbanus, Robert J. Gove
  • Patent number: 6260088
    Abstract: A single integrated circuit includes first and second data processors operating on different instruction sets independently operating on disjoint programs and data. The single integrated circuit preferably includes an external interface, a shared data transfer controller and shared memory divided into plural independently accessible memory banks. The two data processors are preferably a digital signal processor (DSP) and a reduced instruction set computer (RISC) processor. The DSP and RISC processors are suitably programmed to perform differing aspects of computer image processing.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: July 10, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Robert J. Gove, Keith Balmer, Nicholas Kerin Ing-Simmons, Karl Marion Guttag
  • Patent number: 6232936
    Abstract: A method and device for increasing the effective horizontal resolution of a display device. One embodiment forms a cardinal array of digital micromirror elements by staggering alternate rows in an array. According to a second embodiment, an ordinal pixel array 57, is converted to a cardinal pixel array, by grouping SLM elements 59, 61, 63, and 65 into a pixel block 58. All of the elements in a pixel block are controlled in unison such that the pixel block acts like a single pixel. Rows of pixel blocks 67 and 69 are offset to provide the effect of a cardinal array of pixels without the decrease in efficiency sometimes associated with cardinal pixel arrays.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: May 15, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Robert J. Gove, Jeffrey B. Sampsell
  • Patent number: 6116768
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable barrel rotator (235). The rotate amount is a default rotate amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the barrel rotator (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the rotate amount. The output of the barrel rotator (235) may be stored independently of the arithmetic logic unit (230) result. In the preferred embodiment of this invention, the three input arithmetic logic unit (230) is embodied in a data processor circuits as a part of a multiprocessor integrated circuit (100) used in image processing.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: September 12, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 6098163
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shifter (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239).
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: August 1, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 6070003
    Abstract: There is disclosed a multi-processor system and method arranged, in one embodiment, as an image and graphics processor. The image processor is structured with several individual processors all having communication links to several memories. A crossbar switch serves to establish the processor memory links. The entire image processor, including the individual processors, the crossbar switch and the memories, is contained on a single silicon chip.
    Type: Grant
    Filed: June 22, 1994
    Date of Patent: May 30, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert J. Gove, Keith Balmer, Nicholas Kerin Ing-Simmons, Karl Marion Guttag
  • Patent number: 5999227
    Abstract: A system for handling special television video features digitally. The system receives incoming broadcast video into a switch (106). The switch allows the viewer to select a main channel and at least one auxiliary channel for viewing as a special feature, if the viewer does not want to view only the main channel for that particular special feature. The main video channel data is processed by a scan converter (216) to convert it from interlaced to progressive scan. A logic device (212) handles the auxiliary channel data to format it into the selected special feature and inputs that data to the scan converter (216) such that the special feature appears in the proper place relative to the main channel image.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: December 7, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Donald B. Doherty, Robert J. Gove, John R. Reder
  • Patent number: 5995748
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal optionally comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply an N bit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shifter (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal optionally comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239).
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: November 30, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Philip Moyse
  • Patent number: 5995747
    Abstract: A data processing apparatus includes a three input arithmetic logic unit (230) that generates a Boolean combination of the three inputs that is selected by a function signal. The arithmetic logic unit is capable of forming all possible Boolean combinations of the three inputs. Data registers (200) store the three data inputs and the arithmetic logic unit output. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply an N bit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shifter (235) may be stored independently of the arithmetic logic unit (230) result.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: November 30, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Philip Moyse
  • Patent number: 5973733
    Abstract: A system (26) for stabilizing a video recording of a scene (20, 22, & 24) made with a video camera (34) is provided. The video recording may include video data (36) and audio (38) data. The system (26) may include source frame storage (64) for storing source video data (36) as a plurality of sequential frames. The system (26) may also include a processor (50) for detecting camera movement occurring during recording and for modifying the video data (36) to compensate for the camera movement. Additionally the system (26) may include destination frame storage (70) for storing the modified video data as plurality of sequential frames.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: October 26, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Robert J. Gove
  • Patent number: 5974539
    Abstract: A three input arithmetic logic unit (230) generates a combination of the three inputs that is selected by a function signal. The second input signal comes from a controllable shifter (235). The shift amount is a default shift amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the shifter (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the shift amount. The output of the shift (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239). One preferred form of the mask has a number of right justified 1's corresponding to a mask input signal.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: October 26, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 5961635
    Abstract: A three input arithmetic logic unit (230) that generates a combination of the three inputs that is selected by a function signal. The second input signal comes from a controllable barrel rotator (235). The rotate amount is a default rotate amount stored in a special data register, a predetermined set of bits of data recalled from a data register or zero. A one's constant source (236) is connected to the barrel rotator (235) to supply a multibit digital signal of "1". This permits generating a second input signal of the form 2.sup.N, with N being the rotate amount. The output of the barrel rotator (235) may be stored independently of the arithmetic logic unit (230) result. The third input signal comes from a multiplexer (233) that selects between an instruction specified immediate field, data recalled from a data register or a mask input from a mask generator (239). One preferred form of the mask has a number of right justified 1's corresponding to a mask input signal.
    Type: Grant
    Filed: November 30, 1993
    Date of Patent: October 5, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Karl M. Guttag, Keith Balmer, Robert J. Gove, Christopher J. Read, Jeremiah E. Golston, Sydney W. Poland, Nicholas Ing-Simmons, Phillip Moyse
  • Patent number: 5796442
    Abstract: A television system 106 and display method for receiving and displaying television broadcasts having various formats. The television system resizes (106) the various received image formats for display on a common display device. Images are resized horizontally by altering the rate at which data is sampled by the television (106). Images are resized vertically by using vertical scaling algorithms which alter the number of lines in an image. Format detection may be done automatically by decoding information contained in the vertical interval of the television broadcast signal, or by counting the number of lines in each frame. The input format may be indicated by a viewer.
    Type: Grant
    Filed: November 2, 1994
    Date of Patent: August 18, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Robert J. Gove, John R. Reder, Scott D. Heimbuch, Vishal Markandey, Stephen W. Marshall