Abstract: An instrument and method for the troubleshooting and verification of copper-wire local area network (LAN) cable systems provides a series of resistance and capacitance measurements between all possible wire pairs using a pair of switch matrices and a software method for evaluating the measurements which are stored in a two-dimensional matrix. The stored measurements are evaluated against predetermined figures of merit and the decision pattern in matrix form is compared to that of a known good LAN cable system. Error messages responsive to mismatches are generated and presented to the operator via a user interface. Near-end cross talk (NEXT) isolation is evaluated using a mathematically calculated differential capacitance technique. Error messages are generated responsive to difference capacitance values larger than a figure of merit correlated to an acceptable level of NEXT isolation.

Abstract: An instrument and method for the troubleshooting and verification of copper-wire local area network (LAN) cable systems provides a series of resistance and capacitance measurements between all possible wire pairs using a pair of switch matrices and a software method for evaluating the measurements which are stored in a two-dimensional matrix. The stored measurements are evaluated against predetermined figures of merit and the decision pattern in matrix form is compared to that of a known good LAN cable system. Error messages responsive to mismatches are generated and presented to the operator via a user interface. Near-end cross talk (NEXT) isolation is evaluated using a mathematically calculated differential capacitance technique. Error messages are generated responsive to difference capacitance values larger than a figure of merit correlated to an acceptable level of NEXT isolation.

Abstract: A thermal power sensor for providing an output signal that is linearly related to the amount of power derived from a power source over a first range and that is square law related to the amount of power derived from a power source over a second range which may overlap the first range. The apparatus comprises a pair of matched transistors connected in a common emitter configuration. Each of the matched transistors is thermally coupled to a matched resistor so that heat generated in the resistor is transmitted to its respective transistor to cause temperature variations therein. The current through each transistor is a function of the temperature of the transistor. The matched transistors are connected in series with a pair of cascode transistors. The cascode transistors are connected to a first differential amplifier which senses and amplifies the differential voltage which results from any difference in current flow through the matched transistors.

Abstract: A compact selectable AC/DC coaxial coupling having a cylindrical signal coupling capacitor disposed within a section of coaxial transmission line. Inner and outer plates of the capacitor are electrically connected to an external connector and the center conductor of the transmission line, respectively. A radially biased conductive collet or a conductive mesh axially disposed on the center conductor is biased into and out of contact with the inner plate of the capacitor to enable or disable DC coupling. Alternatively, a resilient contact member is displaced through an externally accessible actuating rod to connect the center conductor to the inner plate of the capacitor. The integral nature of these switching mechanisms within a coaxial environment provides both low insertion losses and continuous impedance matching.

Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises a logic gate interconnected with a pair of bistable devices clocked respectively by input and reference digital signals to generate a square wave having a duty ratio corresponding to the phase/frequency difference between the two signals. The duty ratio of the square wave sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square wave is integrated to obtain a repetitive sawtooth. To increase the range, circuitry is provided to provide a constant level signal when the peak of a sawtooth is approached and to reset the bistable devices to provide a multiple of the earlier range.

Abstract: A digital phase/frequency detector circuit in a phase locked loop comprises a logic gate interconnected with a pair of bistable devices clocked respectively by input and reference digital signals to generate a square wave having a duty ratio corresponding to the phase/frequency difference between the two signals. The duty ratio of the square wave sweeps repetitively between minimum and maximum values as the phase/frequency difference changes monotonically. The square wave is integrated to obtain a repetitive sawtooth. To increase the range, circuitry is provided to provide a constant level signal when the peak of a sawtooth is approached and to reset the bistable devices to provide a multiple of the earlier range.