Abstract: A topology for double-ended dual magnetic DC-DC SPC (“Voltage Doubler”) for all else being equal provides twice the output voltage as the conventional topology. The Voltage Doubler differs in that the secondary configuration is stacked in series as compared to the conventional topology in which the secondary configuration of the dual magnetics are in parallel. The output current is AC coupled rather than DC coupled to the load thereby doubling the output voltage. Because of the AC coupling, the Voltage Doubler is configured to automatically maintain balance of the secondary capacitors. During reset of the magnetics, the primary windings are shorted and both synchronous rectifier switches are closed. Due to transformer action, the output capacitors are connected to the output such that charge equalization forces the voltage on each capacitor to be equal.

Abstract: A topology for double-ended dual magnetic DC-DC SPC (“Voltage Doubler”) for all else being equal provides twice the output voltage as the conventional topology. The Voltage Doubler differs in that the secondary configuration is stacked in series as compared to the conventional topology in which the secondary configuration of the dual magnetics are in parallel. The output current is AC coupled rather than DC coupled to the load thereby doubling the output voltage. Because of the AC coupling, the Voltage Doubler is configured to automatically maintain balance of the secondary capacitors. During reset of the magnetics, the primary windings are shorted and both synchronous rectifier switches are closed. Due to transformer action, the output capacitors are connected to the output such that charge equalization forces the voltage on each capacitor to be equal.

Abstract: A multi slope output impedance controller is configured to vary the effective impedance Zeff_n of a power converter to reduce a current imbalance between power supplies in a masterless configuration of N parallel-connected power supplies while maintaining load regulation during start-up and sready-state operation. Generally speaking, the controller commands a high value of Zeff_n when Iout_n is low to facilitate current sharing and reduce current imbalance Ib between the power supplies and commands a low value of Zeff_n when Iout_n is high to improve load regulation.

Abstract: A dual-path active damper reduces power losses while damping ringing waveforms in resonant circuits. One path clamps the peak value of a node voltage at less than a rated voltage of a protected device while allowing the node voltage to ring and decay naturally. Another path waits for some delay after the peak value is clamped until closing an active switch to draw a reset current through an RC snubber to actively dampen the ringing of the node voltage. The delay and on-time of the active switch are set to reduce or even minimize power losses for damping the ringing waveform within a specified period.

Abstract: The present invention provides a prestart control circuit that measures a reflected voltage on the primary side of a switching power converter. The prestart control circuit pulses the synchronous rectifier switch OPEN and CLOSED, which allows a measurement of the reflected voltage on the primary side of the switching power converter. The reflected voltage is proportionate to the output voltage of the switching power converter. The prestart control circuit uses the reflected voltage to establish the initial duty cycle of the switching power converter. The switching power converter may be any converter that includes a synchronous rectifier, such as a flyback converter or a forward converter, in a single-ended, double-ended and/or multi-phased configuration.

Abstract: The present invention provides a prestart control circuit that measures a reflected voltage on the primary side of a switching power converter. The prestart control circuit pulses the synchronous rectifier switch OPEN and CLOSED, which allows a measurement of the reflected voltage on the primary side of the switching power converter. The reflected voltage is proportionate to the output voltage of the switching power converter. The prestart control circuit uses the reflected voltage to establish the initial duty cycle of the switching power converter. The switching power converter may be any converter that includes a synchronous rectifier, such as a flyback converter or a forward converter, in a single-ended, double-ended and/or multi-phased configuration.

Abstract: A pre-bias control circuit for a switching power converter detects the slope of the output voltage over time and outputs an OPEN command when the slope detected is more NEGATIVE than a pre-defined threshold and a pre-charge current that flows back through the switching power converter has reached a maximum value. In response, the synchronous rectifier switch OPENs overriding the typical control waveform to control the energy from the output voltage from flowing back through the switching power converter. The switching power converter may be any converter that includes a synchronous rectifier, such as a flyback converter, a forward converter, a buck converter, in a single-ended, double-ended and/or multi-phased configuration.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An all-digital line-of-sight (LOS) process architecture addresses the size, weight, power and performance constraints of a receiver for use in semi-active or active pulsed electromagnetic (EM) targeting systems. The all-digital architecture provides a platform for enhanced techniques for sensitive pulse detection over a wide field-of-view, adaptive pulse detection, LOS processing and counter measures.

Abstract: An engine management system for a vehicle includes engine and transmission control modules that are connected to a serial vehicle data bus. A dedicated serial data bus is connected to the transmission control module and the engine control module. The engine and the transmission control modules perform processor validity and integrity checks over the dedicated data bus. In an alternate powertrain management system, engine and transmission control modules are connected to a serial vehicle data bus.

Abstract: Apparatus are provided for an electronic throttle control (ETC) system having a throttle body assembly. The apparatus includes a throttle actuator, an input circuit receiving sensor signals and having first, second, and third reference voltages, a first throttle position sensor (TPS) connected to the second reference voltage, a second TPS connected to the second reference voltage, a manifold absolute pressure (MAP) sensor connected to the first reference voltage, a manifold airflow (MAF) sensor connected to the third reference voltage, and a processor connected to the input circuit and transmitting a control signal to the throttle actuator based on the sensors, reference voltages, and returns. The ETC system has improved remedial actions responsive to failures of the various sensors, reference voltages, and returns.

Abstract: An optical sensor system (20) has an optical detector (28) with an active detector area (38) and a detector output signal (40). A test-signal optical source (44) has a controllable optical source (48) having an output of a wavelength detectable by the optical detector (28), and a test-signal director (50) that directs the output of the optical source (48) to the active detector area (38) of the optical detector (28). A housing (22) encloses the optical detector (28) and the test-signal optical source (44). A test instrumentation controller (52) controls the operation of the optical source (48), and receives the detector output signal (40) for evaluation.

Abstract: Methods and apparatus are provided for adjusting a throttle of a vehicle engine. The apparatus comprises an input sensor configured to provide an input signal having a value that approximately corresponds to an operating level of the vehicle engine requested by an operator and a memory configured to store a maximum input value for the input sensor. The maximum input value provides the value of the input signal that approximately corresponds to a maximum operating level of the vehicle engine. The apparatus is further configured to receive the input signal and access the memory to retrieve the maximum input value and further configured to update the maximum input value with the value of the input signal if the value of the input signal is greater than the maximum input value.

Abstract: An engine management system for a vehicle includes engine and transmission control modules that are connected to a serial vehicle data bus. A dedicated serial data bus is connected to the transmission control module and the engine control module. The engine and the transmission control modules perform processor validity and integrity checks over the dedicated data bus. In an alternate powertrain management system, engine and transmission control modules are connected to a serial vehicle data bus.