Patents by Inventor Robert Keith Montgomery

Robert Keith Montgomery has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8363995
    Abstract: A set of planar, two-dimensional optical devices is able to be created in a sub-micron surface layer of an SOI structure, or within a sub-micron thick combination of an SOI surface layer and an overlying polysilicon layer. Conventional masking/etching techniques may be used to form a variety of passive and optical devices in this SOI platform. Various regions of the devices may be doped to form the active device structures. Additionally, the polysilicon layer may be separately patterned to provide a region of effective mode index change for a propagating optical signal.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: January 29, 2013
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20110216997
    Abstract: A set of planar, two-dimensional optical devices is able to be created in a sub-micron surface layer of an SOI structure, or within a sub-micron thick combination of an SOI surface layer and an overlying polysilicon layer. Conventional masking/etching techniques may be used to form a variety of passive and optical devices in this SOI platform. Various regions of the devices may be doped to form the active device structures. Additionally, the polysilicon layer may be separately patterned to provide a region of effective mode index change for a propagating optical signal.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 8, 2011
    Applicant: LIGHTWIRE, INC.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Patent number: 7929814
    Abstract: A set of planar, two-dimensional optical devices is able to be created in a sub-micron surface layer of an SOI structure, or within a sub-micron thick combination of an SOI surface layer and an overlying polysilicon layer. Conventional masking/etching techniques may be used to form a variety of passive and optical devices in this SOI platform. Various regions of the devices may be doped to form the active device structures. Additionally, the polysilicon layer may be separately patterned to provide a region of effective mode index change for a propagating optical signal.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: April 19, 2011
    Assignee: Lightwire, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Patent number: 7587106
    Abstract: An arrangement for providing optical crossovers between waveguides formed in an SOI-based structure utilize a patterned geometry in the SOI structure that is selected to reduce the effects of crosstalk in the area where the signals overlap. Preferably, the optical signals are fixed to propagate along orthogonal directions (or are of different wavelengths) to minimize the effects of crosstalk. The geometry of the SOI structure is patterned to include predetermined tapers and/or reflecting surfaces to direct/shape the propagating optical signals. The patterned waveguide regions within the optical crossover region may be formed to include overlying polysilicon segments to further shape the propagating beams and improve the coupling efficiency of the crossover arrangement.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: September 8, 2009
    Assignee: Lightwire, Inc.
    Inventors: David Piede, Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7539358
    Abstract: The surface silicon layer (SOI layer) of an SOI-based optical modulator is processed to exhibit a corrugated surface along the direction of optical signal propagation. The required dielectric layer (i.e., relatively thin “gate oxide”) is formed over the corrugated structure in a manner that preserves the corrugated topology. A second silicon layer, required to form the modulator structure, is then formed over the gate oxide in a manner that follows the corrugated topology, where the overlapping portion of the corrugated SOI layer, gate oxide and second silicon layer defines the active region of the modulator. The utilization of the corrugated active region increases the area over which optical field intensity will overlap with the free carrier modulation region, improving the modulator's efficiency.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: May 26, 2009
    Assignee: Lightwire Inc.
    Inventors: Robert Keith Montgomery, Vipulkumar Patel
  • Patent number: 7515778
    Abstract: An optical modulator is formed to include an adjustable drive arrangement for dynamically adjusting the effective length of the optical signals path(s) within the modulator. Each modulator arm is partitioned into a plurality of segments, with each segment coupled to a separate electrical signal driver. Therefore, the effective length of each modulator arm will be a function of the number of drivers that are activated for each arm at any given point in time. A feedback arrangement may be used with the plurality of drivers to dynamically adjust the operation of the modulator by measuring the extinction ratio as a function of optical power, turning “on” or “off” individual drivers accordingly.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: April 7, 2009
    Assignee: Lightwire, Inc.
    Inventors: Paulius Mindaugas Mosinskis, Robert Keith Montgomery, Prakash Gothoskar
  • Patent number: 7499620
    Abstract: A method and structure for reducing optical signal loss in a silicon waveguide formed within a silicon-on-insulator (SOI) structure uses CMOS processing techniques to round the edges/corners of the silicon material along the extent of the waveguiding region. One exemplary set of processes utilizes an additional, sacrificial silicon layer that is subsequently etched to form silicon sidewall fillets along the optical waveguide, the fillets thus “rounding” the edges of the waveguide. Alternatively, the sacrificial silicon layer can be oxidized to consume a portion of the underlying silicon waveguide layer, also rounding the edges. Instead of using a sacrificial silicon layer, an oxidation-resistant layer may be patterned over a blanket silicon layer, the pattern defined to protect the optical waveguiding region.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: March 3, 2009
    Assignee: Lightwire, Inc.
    Inventors: Vipulkumar Kantilal Patel, Prakash Gothoskar, Robert Keith Montgomery, Margaret Ghiron
  • Patent number: 7447395
    Abstract: A silicon-based optical modulator structure includes one or more separate localized heating elements for changing the refractive index of an associated portion of the structure and thereby providing corrective adjustments to address unwanted variations in device performance. Heating is provided by thermo-optic devices such as, for example, silicon-based resistors, silicide resistors, forward-biased PN junctions, and the like, where any of these structures may easily be incorporated with a silicon-based optical modulator. The application of a DC voltage to any of these structures will generate heat, which then transfers into the waveguiding area. The increase in local temperature of the waveguiding area will, in turn, increase the refractive index of the waveguiding in the area. Control of the applied DC voltage results in controlling the refractive index.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: November 4, 2008
    Assignee: SiOptical, Inc.
    Inventors: Robert Keith Montgomery, Margaret Ghiron, Prakash Gothoskar, Paulius Mindaugas Mosinskis, Vipulkumar Patel, Kalpendu Shastri, Mark Webster
  • Patent number: 7440703
    Abstract: An electro-optic modulator arrangement for achieving switching speeds greater than 1 Gb/s utilizes pre-emphasis pulses to accelerate the change in refractive index of the optical waveguide used to form the electro-optic modulator. In one embodiment, a feedback loop may be added to use a portion of the modulated optical output signal to adjust the magnitude and duration of the pre-emphasis pulses, as well as the various reference levels used for modulated. For free carrier-based electro-optic modulators, including silicon-based electro-optic modulators, the pre-emphasis pulses are used to accelerate the movement of free carriers at the transitions between input signal data values.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: October 21, 2008
    Assignee: SiOptical, Inc.
    Inventors: Kalpendu Shastri, Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20080253713
    Abstract: An arrangement for providing optical crossovers between waveguides formed in an SOI-based structure utilize a patterned geometry in the SOI structure that is selected to reduce the effects of crosstalk in the area where the signals overlap. Preferably, the optical signals are fixed to propagate along orthogonal directions (or are of different wavelengths) to minimize the effects of crosstalk. The geometry of the SOI structure is patterned to include predetermined tapers and/or reflecting surfaces to direct/shape the propagating optical signals. The patterned waveguide regions within the optical crossover region may be formed to include overlying polysilicon segments to further shape the propagating beams and improve the coupling efficiency of the crossover arrangement.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 16, 2008
    Inventors: David Piede, Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7415184
    Abstract: An arrangement for providing optical coupling into and out of a relatively thin silicon waveguide formed in the SOI layer of an SOI structure includes a lensing element and a defined reference surface within the SOI structure for providing optical coupling in an efficient manner. The input to the waveguide may come from an optical fiber or an optical transmitting device (laser). A similar coupling arrangement may be used between a thin silicon waveguide and an output fiber (either single mode fiber or multimode fiber).
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: August 19, 2008
    Assignee: SiOptical Inc.
    Inventors: Margaret Ghiron, Prakash Gothoskar, John Fangman, Robert Keith Montgomery, Mary Nadeau
  • Publication number: 20080105940
    Abstract: A photodetector integrated within a silicon-on-insulator (SOI) structure is formed directly upon an inverse nanotaper endface coupling region to reduce polarization sensitivity at the detector's input. The photodetector may be germanium-based PN (PIN) junction photodetector, a SiGe photodetector, a metal/silicon Schottky barrier photodetector, or any other suitable silicon-based photodetector. The inverse nanotaper photodetector may also be formed as an in-line monitoring device, converting only a portion of the in-coupled optical signal and allowing for the remainder to thereafter propagate along an associated optical waveguide.
    Type: Application
    Filed: June 12, 2007
    Publication date: May 8, 2008
    Inventors: David Piede, Vipulkumar Patel, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery
  • Patent number: 7358585
    Abstract: A silicon-based IR photodetector is formed within a silicon-on-insulator (SOI) structure by placing a metallic strip (preferably, a silicide) over a portion of an optical waveguide formed within a planar silicon surface layer (i.e., “planar SOI layer”) of the SOI structure, the planar SOI layer comprising a thickness of less than one micron. Room temperature operation of the photodetector is accomplished as a result of the relatively low dark current associated with the SOI-based structure and the ability to use a relatively small surface area silicide strip to collect the photocurrent. The planar SOI layer may be doped, and the geometry of the silicide strip may be modified, as desired, to achieve improved results over prior art silicon-based photodetectors.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: April 15, 2008
    Assignee: SiOptical, Inc.
    Inventors: Vipulkumar Patel, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Soham Pathak, David Piede, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7327911
    Abstract: An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: February 5, 2008
    Assignee: SiOptical, Inc.
    Inventors: David Piede, Kalpendu Shastri, Robert Keith Montgomery, Prakash Gothoskar, Vipulkumar Patel, Mary Nadeau
  • Publication number: 20070292075
    Abstract: A silicon-based optical modulator structure includes one or more separate localized heating elements for changing the refractive index of an associated portion of the structure and thereby providing corrective adjustments to address unwanted variations in device performance. Heating is provided by thermo-optic devices such as, for example, silicon-based resistors, silicide resistors, forward-biased PN junctions, and the like, where any of these structures may easily be incorporated with a silicon-based optical modulator. The application of a DC voltage to any of these structures will generate heat, which then transfers into the waveguiding area. The increase in local temperature of the waveguiding area will, in turn, increase the refractive index of the waveguiding in the area.
    Type: Application
    Filed: June 6, 2007
    Publication date: December 20, 2007
    Inventors: Robert Keith Montgomery, Margaret Ghiron, Prakash Gothoskar, Paulius Mindaugas Mosinskis, Vipulkumar Patel, Kalpendu Shastri, Mark Webster
  • Patent number: 7298949
    Abstract: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: November 20, 2007
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, David Piede, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7187837
    Abstract: An arrangement for actively controlling, in two dimensions, the manipulation of light within an SOI-based optical structure utilizes doped regions formed within the SOI layer and a polysilicon layer of a silicon-insulator-silicon capacitive (SISCAP) structure. The regions are oppositely doped so as to form an active device, where the application of a voltage potential between the oppositely doped regions functions to modify the refractive index in the affected area and alter the properties of an optical signal propagating through the region. The doped regions may be advantageously formed to exhibit any desired “shaped” (such as, for example, lenses, prisms, Bragg gratings, etc.), so as to manipulate the propagating beam as a function of the known properties of these devices. One or more active devices of the present invention may be included within a SISCAP formed, SOI-based optical element (such as, for example, a Mach-Zehnder interferometer, ring resonator, optical switch, etc.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: March 6, 2007
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Patent number: 7118682
    Abstract: A method and structure for reducing optical signal loss in a silicon waveguide formed within a silicon-on-insulator (SOI) structure uses CMOS processing techniques to round the edges/corners of the silicon material along the extent of the waveguiding region. One exemplary set of processes utilizes an additional, sacrificial silicon layer that is subsequently etched to form silicon sidewall fillets along the optical waveguide, the fillets thus “rounding” the edges of the waveguide. Alternatively, the sacrificial silicon layer can be oxidized to consume a portion of the underlying silicon waveguide layer, also rounding the edges. Instead of using a sacrificial silicon layer, an oxidation-resistant layer may be patterned over a blanket silicon layer, the pattern defined to protect the optical waveguiding region.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: October 10, 2006
    Assignee: SiOptical, Inc.
    Inventors: Vipulkumar Kantilal Patel, Prakash Gothoskar, Robert Keith Montgomery, Margaret Ghiron
  • Patent number: 7113676
    Abstract: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N?1 isolating waveguides).
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: September 26, 2006
    Inventors: David Piede, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski, Harvey Wagner
  • Patent number: 7109739
    Abstract: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: September 19, 2006
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, David Piede, Katherine A. Yanushefski