Patents by Inventor Robert Matthew Barrie

Robert Matthew Barrie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120095908
    Abstract: A method and apparatus for engaging, on behalf of a client computing device, one or more remote computing devices to perform a client directed task for a fee. The method comprising the steps of: receiving, from a client computing device, data indicative of a task to be performed; reviewing capabilities of the remote computing devices; selecting one or more suitable remote computing devices for performing at least a first subtask; negotiating, and reaching agreement, with selected remote computing devices on terms for performing the first subtask; verifying receipt of payment from a client, being associated with the client computing device; dispatching the first subtask; receiving a first result, from respective remote computing device; and providing payment to a remote provider, being associated with the remote computer device.
    Type: Application
    Filed: April 18, 2011
    Publication date: April 19, 2012
    Inventors: Robert Matthew Barrie, Darren Nicholas John Williams, David Harrison, Peter Phillips
  • Patent number: 7411418
    Abstract: The states associated with a programmable state machine are reordered to compress the storage of transitions which define the state machine. To reorder the states, a score is computed and assigned to each of the states. Next, the states are sorted according to their computed scores. In some embodiments, to compute the score for each current state based on the received input symbol, the number of times that the input symbol causes transition to similar states is added. The sum of the scores in each row of the table is representative of the score for the associated current state associated with that row. The states are sorted according to their score and a new state transition table is generated in accordance with the reordered states.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: August 12, 2008
    Assignee: Sensory Networks, Inc.
    Inventors: Stephen Gould, Robert Matthew Barrie, Michael Flanagan, Darren Williams
  • Publication number: 20080022401
    Abstract: A multicore network security system includes scheduler modules, one or more security modules and post-processing modules. Each security module may be a processing core or itself a network security system. A scheduler module routes input data to the security modules, which perform network security functions, then routes processed data to one or more post-processing modules. The post-processing modules post-process this processed data and route it back to scheduler modules. If further processing is required, the processed data is routed to the security modules; otherwise the processed data is output from the scheduler modules. Each processing core may operate independently from other processing cores, enabling parallel and simultaneous execution of network security functions.
    Type: Application
    Filed: July 21, 2006
    Publication date: January 24, 2008
    Applicant: Sensory Networks Inc.
    Inventors: Craig Cameron, Teewoon Tan, Darren Williams, Robert Matthew Barrie
  • Patent number: 7301792
    Abstract: A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: November 27, 2007
    Assignee: Sensory Networks, Inc.
    Inventors: Stephen Gould, Robert Matthew Barrie, Darren Williams, Nicholas de Jong
  • Patent number: 7219319
    Abstract: A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: May 15, 2007
    Assignee: Sensory Networks, Inc.
    Inventors: Stephen Gould, Robert Matthew Barrie, Darren Williams, Nicholas de Jong
  • Patent number: 7180328
    Abstract: A programmable finite state machine (FSM) includes, in part, a first address calculation logic block, a first lookup table, a second address calculation logic block, and a second lookup table. The first address calculation logic block generates an address for the first lookup table based on the received input symbol and the current state. The data stored in first look-up table at the generated address is used by the second address calculation logic block to compute an address for the second lookup table. Data stored in the second lookup table is the next state to which the FSM transitions. The programmable FSMs uses redundant information of the transition table to compress these transitions and thus requires a smaller memory while maintaining a high data throughput. The data in the first and second lookup tables are coded and supplied by a compiler. The FSM operation may optionally be pipelined.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: February 20, 2007
    Assignee: Sensory Networks, Inc.
    Inventors: Stephen Gould, Ernest Peltzer, Robert Matthew Barrie, Michael Flanagan, Darren Williams
  • Patent number: 7082044
    Abstract: A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: July 25, 2006
    Assignee: Sensory Networks, Inc.
    Inventors: Stephen Gould, Robert Matthew Barrie, Darren Williams, Nicholas de Jong