Patents by Inventor Robert P. DePuy

Robert P. DePuy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6198268
    Abstract: A dual-rated current transformer circuit has a first circuit which delivers a first current and a second circuit which delivers a second current. A current transformer is coupled to both the first and second circuits, wherein the transformer generates a current proportional to the current of each of the first and second currents.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: March 6, 2001
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 6031400
    Abstract: A circuit for generating at least two output voltages in response to an input current. A first stage comprises a first impedance for providing a first output voltage when the input current passes through the first impedance. At least a second stage comprises a second impedance coupled to the first impedance, wherein the second impedance provides a second stage voltage when the input current passes through the second impedance. At least a second output voltage is equal to the sum of the second stage voltage and the first output voltage. The second stage further comprises a second stage shunt operable to shunt the input current away from the second impedance when the magnitude of the second output voltage is above a predetermined amount.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: February 29, 2000
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 5991144
    Abstract: An apparatus for tripping a circuit breaker having a trip coil. A trip circuit is coupled at a first node to a first power supply and at a second node to the trip coil. The trip circuit comprises a switch for closing in response to a control signal, a coil coupled to the switch so that current is allowed to flow through the coil when the switch closes, relay contacts operatively coupled to the coil so that the relay contacts close when current flows through the coil, and a zener diode for providing a low impedance path after the relay contacts close and for applying a holding voltage across the coil sufficient to keep the relay contacts closed while current flows through the low impedance path.
    Type: Grant
    Filed: January 3, 1997
    Date of Patent: November 23, 1999
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 5952855
    Abstract: A circuit for generating at least two output voltages in response to an input current. A first stage comprises a first impedance for providing a first output voltage when the input current passes through the first impedance. At least a second stage comprises a second impedance coupled to the first impedance, wherein the second impedance provides a second stage voltage when the input current passes through the second impedance. At least a second output voltage is equal to the sum of the second stage voltage and the first output voltage. The second stage further comprises a second stage shunt operable to shunt the input current away from the second impedance when the magnitude of the second output voltage is above a predetermined amount.
    Type: Grant
    Filed: January 3, 1997
    Date of Patent: September 14, 1999
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4561047
    Abstract: A series flyback switching regulator, having a transformer with a primary coil for receiving an unregulated input voltage and a secondary coil for providing a regulated output voltage, includes a circuit for limiting the magnitude of a substantial overload or short circuit current. The current limiting circuit senses the magnitude of current flowing through the primary coil and sets a current limit level which is based upon a predetermined maximum current allowed in the primary coil. The current limiting circuit also senses the magnitude of the voltage present at the secondary coil of the transformer and reduces the current limit level, based upon a sensed reduction in the secondary coil voltage. The input voltage is removed from the primary coil when the magnitude of the current through the primary coil exceeds the current limit level as reduced by the sensed reduction of the voltage appearing across the secondary coil.
    Type: Grant
    Filed: December 19, 1983
    Date of Patent: December 24, 1985
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4477856
    Abstract: A relay spare circuit for a recloser relay provides an output signal selected to occur during a particular segment of the reclose cycle of a fault-responsive circuit breaker. A set of switches is provided to select which of a plurality of available recloses are to be used and where in the resulting reclose cycle the relay spare is to operate, and a logic circuit is provided which compares the selected switches with a counter responsive to advancement of the recloser relay through the reclose cycle, to provide the relay spare output signal at the selected point in the reclose cycle.
    Type: Grant
    Filed: September 30, 1982
    Date of Patent: October 16, 1984
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4454556
    Abstract: A timing controller which supervises the reclosure of a fault responsive circuit breaker which includes a plurality of selectable switches for developing signals representing the reset and reclose delay times for the recloser relay operatively associated with the fault responsive circuit breaker; a plurality of multiplexers for receiving the signals developed by the selectable switches and for developing serially formatted digital words in accordance with such signals for delivery to an output controlling multiplexer; a first counter assembly for regulating the output of the output controlling multiplexer in accordance with the condition of the recloser relay; a storage device for receiving and storing the output of the output controlling multiplexer; and a comparison device for comparing the stored output of the output controlling multiplexer with a second counter assembly which develops a timed output signal.
    Type: Grant
    Filed: September 30, 1982
    Date of Patent: June 12, 1984
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4350956
    Abstract: A circuit is disclosed which performs two functions: (1) it develops a D.C. voltage signal which is proportional to the difference between the D.C. voltage components of a first and a second voltage, each comprising a D.C. voltage component and an A.C. voltage component impressed thereon, and (2) it filters the A.C. voltage components of both the first and second voltages. This circuit comprises cascade-connected first and second networks, each comprising an operational amplifier, with the output of the first network coupled to the input of the second network. Said first voltage is supplied as an input to the first network, and said second voltage is supplied as an input to the second network. The second network develops a D.C. output signal that is representative of the difference between the D.C. voltage components of the first and second voltages.
    Type: Grant
    Filed: October 20, 1980
    Date of Patent: September 21, 1982
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4318154
    Abstract: A drive circuit responsive to an applied electrical signal for generating a voltage to control the actuation of an electromagnetic relay is disclosed. The voltage has a first and a second level for picking-up and holding-in, respectively, the relay. The first voltage level has a peak value which is developed by an internal charging circuit and is additive to the second voltage level supplied by an external source. The first voltage level is higher than required to actuate the relay which enhances the pick-up speed of the relay.
    Type: Grant
    Filed: October 16, 1980
    Date of Patent: March 2, 1982
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4314327
    Abstract: A D.C. to D.C. voltage converter is disclosed that operates with various applied D.C. input voltages, each having a different voltage level, to develop a desired D.C. output voltage. The D.C. to D.C. voltage converter has a saturable transformer that is sequentially excited into its positive and negative saturation conditions under control of sequentially operating first and second transistor diode combinations. The D.C. to D.C. converter has a base drive current circuit comprised of a full-wave rectifier and a multiple level current limiting circuit. The base drive current circuit is interposed between a base drive winding of the saturable transformer and the base electrodes of the transistors of first and second transistor diode combinations. The base drive circuit adapts the saturation condition of the first and second transistor diode combinations to the level of the applied D.C.
    Type: Grant
    Filed: November 17, 1980
    Date of Patent: February 2, 1982
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4241410
    Abstract: Apparatus is described for the generation of a series of binary numbers which has a minimum value other than zero, has a major sequence of numbers in which successive numbers are separated by a first fixed increment starting from the minimum value and defining the range of the series of numbers, and has a plurality of minor sequences, each representing binary numbers of the series lying between respective successive numbers of the major sequence with each number of a minor sequence being spaced from a preceding number thereof by a second fixed increment.
    Type: Grant
    Filed: March 19, 1979
    Date of Patent: December 23, 1980
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4219860
    Abstract: Digital overcurrent relay apparatus utilizing sampling, digital conversion and digital comparison techniques is described. The apparatus provides a trip signal after an alternating current in a line being monitored by the apparatus exceeds a preset pick up value for a period of time which is an inverse function of the magnitude of the current expressed in multiples of pick up value.
    Type: Grant
    Filed: December 20, 1978
    Date of Patent: August 26, 1980
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4219858
    Abstract: Digital overcurrent relay apparatus utilizing sampling, digital conversion and digital comparison techniques is described. The apparatus provides a trip signal after an alternating current in a line being monitored by the apparatus exceeds a preset pick up value for a period of time which is an inverse function of the magnitude of the current expressed in multiples of pick up value.
    Type: Grant
    Filed: December 20, 1978
    Date of Patent: August 26, 1980
    Assignee: General Electric Company
    Inventors: Robert P. DePuy, Arthur H. Leitten, Jr.
  • Patent number: 4190825
    Abstract: An analog-to-digital converter is described in which a sequence of samples of an analog signal is converted into a sequence of binary numbers which appear at the output terminals of a composite counter comprising a first counter and a second counter. The first and second counters are gated in sequence by gating waveforms to provide for each sample the count corresponding to the logarithm of the sample. The gating waveforms are derived from a charge and discharge cycle of a capacitor to which the sample is supplied. Selected times in the charging and discharging portions of the cycle are utilized for deriving the gating waveforms.
    Type: Grant
    Filed: December 20, 1978
    Date of Patent: February 26, 1980
    Assignee: General Electric Company
    Inventors: Robert P. DePuy, Arthur H. Leitten, Jr.
  • Patent number: 4038695
    Abstract: A static trip unit for automatic electric circuit breakers includes an analog to digital converter for converting an analog signal proportional to the magnitude of current flowing in a distribution circuit to a digital signal having a pulse frequency proportional to the second power of the analog signal. When the analog signal exceeds a preselected threshold level, a binary counter is conditioned to accumulate the digital signal pulse. A decoder monitors the pulse count accumulating in the counter and issues a trip signal when the pulse count reaches a preselected total.
    Type: Grant
    Filed: April 19, 1976
    Date of Patent: July 26, 1977
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 4004201
    Abstract: A multi-function solid state trip unit for automatic electric circuit breakers incorporates indicators functioning to signal which of the functions, e.g., short circuit, overload or ground fault, was operative in tripping the circuit breaker. A bypass circuit is included to insure that tripping of the circuit breaker is not jeopardized by failure of the indicators.
    Type: Grant
    Filed: August 25, 1975
    Date of Patent: January 18, 1977
    Assignee: General Electric Company
    Inventor: Robert P. DePuy
  • Patent number: 3999109
    Abstract: A control circuit for reversibly driving a motor from a small d-c voltage. A switched a-c voltage source is selectively applied to the primary windings of either of two voltage step down transformers. The a-c voltage of each secondary winding is rectified and applied to the motor through a series resistor. The rectified voltage from one transformer drives the motor in one direction and the rectified voltage from the other transformer drives the motor in the reverse direction.
    Type: Grant
    Filed: May 9, 1975
    Date of Patent: December 21, 1976
    Assignee: General Electric Company
    Inventor: Robert P. DePuy