Patents by Inventor Roger W. Van Brunt

Roger W. Van Brunt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8664991
    Abstract: Apparatus and methods for phase-locked loops (PLLs) are provided. In certain implementations, a PLL includes a voltage controlled oscillator (VCO) including first and second frequency control circuits, which are coupled to first and second frequency control inputs, respectively. Additionally, the PLL can further include a loop filter, a high frequency pole circuit, and a low frequency pole circuit. The high frequency pole circuit can be electrically connected between the loop filter's output and the VCO's first frequency control input, and the low frequency pole circuit can be electrically connected between the loop filter's output and the VCO's second frequency control input.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: March 4, 2014
    Assignee: Analog Devices, Inc.
    Inventor: Roger W Van Brunt
  • Patent number: 7773965
    Abstract: The present invention is a quadrature VLIF receiver, including calibration circuitry, and methods to closely match signal processing of an in-phase signal path and a quadrature-phase signal path to optimize VLIF image rejection. The calibration circuitry includes a variable gain variable-phase calibration signal generator, a variable gain amplifier for each signal path, phase adjustment circuitry for each signal path, and switching circuitry to support calibration steps. The calibration signal generator supplies a calibration signal at the same frequency as mixer local oscillator signals; therefore, during calibration, all signals downstream of the VLIF mixer are at DC, which simplifies calibration measurements, thereby minimizing calibration times.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: August 10, 2010
    Assignee: RF Micro Devices, Inc.
    Inventors: Roger W. Van Brunt, Mark Alexander John Moffat, Steve Picken
  • Patent number: 5778204
    Abstract: A bus circuit for implementing a high speed dominant logic bus for a differential signal. The bus circuit is useful in a communication network having a plurality of multi-port nodes that are coupled by point-to-point links that communicate differential signals. Each port in the node includes a bus driver that receives the differential signal received at the port. The bus driver supplies a differential current signal to a first bus. A terminator circuit is coupled to the first differential bus, to receive the differential current signals supplied from the ports. The terminator circuit, responsive to the differential current signal, outputs a differential voltage signal indicative of either a dominant state or a non-dominant state to a second differential bus, which is coupled to the plurality of ports for transmission. A biasing circuit for the bus drivers allows operation at low voltages, and furthermore insures the zero crossing of the differential voltage signal on the second differential bus.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: July 7, 1998
    Assignee: Apple Computer, Inc.
    Inventors: Roger W. Van Brunt, Florin Oprescu
  • Patent number: 5592510
    Abstract: In a driver circuit for a twisted pair cable, a compensator for preventing appreciable common mode current flow into or out of the twisted pair cable in response to the device receiving a wide range of common mode voltage bias levels. A wide range of external bias voltages may be received as a result of variations in the ground node voltages of two coupled devices. The compensator circuit utilizes a feed back loop and monitors the bias voltage received on the twisted pair cable. As the magnitude of the common mode current increases due to external bias voltage variation from a reference bias voltage, the current flow of p-channel transistors, coupled in an arrangement of the present invention, is increased (or decreased, as necessary) so that reduced common mode current flows onto the twisted pair cable. The present invention reduces appreciable common mode current flow through the twisted pair cable from the driver that are due to variations in the external bias voltage between communication devices.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: January 7, 1997
    Assignee: Apple Computer, Inc.
    Inventors: Roger W. Van Brunt, Florin A. Oprescu
  • Patent number: 5579486
    Abstract: A node for a communication system that has a plurality of nodes, each of which may be coupled to a local host. The nodes are coupled between themselves in a tree topology by a plurality of point-to-point links. The interconnected nodes provide a first bus configuration for arbitration like a single bus. Following arbitration, the interconnected nodes provide a second configuration for high speed unidirectional data transfer without the bandwidth limitations of a single bus. Each node includes an arbiter, a data bus, a plurality of ports, a first multiplexer to select either the arbiter or the data bus, and a second multiplexer to select either the arbiter or the data bus. The data bus includes a transmit bus and a receive bus that are coupled with a repeater circuit that can resynchronize the data. During arbitration, the multiplexers select the arbiter to provide the function of a single bus for all the nodes. During data transfer, the multiplexers are configured for transmission of data.
    Type: Grant
    Filed: January 14, 1993
    Date of Patent: November 26, 1996
    Assignee: Apple Computer, Inc.
    Inventors: Florin Oprescu, Roger W. Van Brunt
  • Patent number: 5493657
    Abstract: A bus circuit for implementing a high speed dominant logic bus for a differential signal. The bus circuit is useful in a communication network having a plurality of multi-port nodes that are coupled by point-to-point links that communicate differential signals. Each port in the node includes a bus driver that receives the differential signal received at the port. The bus driver supplies a differential current signal to a first bus. A terminator circuit is coupled to the first differential bus, to receive the differential current signals supplied from the ports. The terminator circuit, responsive to the differential current signal, outputs a differential voltage signal indicative of either a dominant state or a non-dominant state to a second differential bus, which is coupled to the plurality of ports for transmission.
    Type: Grant
    Filed: June 21, 1993
    Date of Patent: February 20, 1996
    Assignee: Apple Computer, Inc.
    Inventors: Roger W. Van Brunt, Florin Oprescu
  • Patent number: 5485458
    Abstract: A bus interconnect device including port control logic for a communication network having a plurality of multi-port nodes that are connected with point-to-point links. Each node includes a transceiver, turn around logic that controls the transceiver, and a dominant logic physical bus that is coupled to all ports in a node. A bus interconnect device includes a first port, a second port, and a point-to-point link between the first and second ports. During arbitration, from the viewpoint of each node, the bus interconnect devices cause the plurality of physical buses to appear to be a single logical bus having a dominant logic. During data transfer following arbitration, the bus interconnect devices are configured to transmit data from the winning node to all other nodes.
    Type: Grant
    Filed: March 5, 1993
    Date of Patent: January 16, 1996
    Assignee: Apple Computer, Inc.
    Inventors: Florin Oprescu, Roger W. Van Brunt
  • Patent number: 5485488
    Abstract: A mechanism and method for efficiently communicating information regarding particular communication rate ("speed signal") between two or more communication stations (of a communication network). The transmitter operates on the IEEE P1394 High Performance Serial Bus to supply both differential and common mode signaling required by the IEEE standard for exemplary data transfer rates of 100 and 200 Mbit transmission. The present invention includes a transmission circuit that may operate in a differential signal mode and simultaneously in a common mode signal mode both utilizing a twisted pair cable. Data may be transmitted on the twisted pair at small differential signals. Information regarding the signal speed between two coupled units may be simultaneously transmitted using variations in the common mode voltage over the twisted pair. Communication may be initiated at a slower communication rate and then upgraded as appropriate for the two units.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: January 16, 1996
    Assignee: Apple Computer, Inc.
    Inventors: Roger W. Van Brunt, Florin A. Oprescu