Patents by Inventor Roland Schuetz

Roland Schuetz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110298128
    Abstract: A semiconductor device has a substrate having a first plurality of substrate bonding pads disposed on a bonding surface thereof. A plurality of semiconductor dice is disposed on the substrate. Each die of the plurality of dice has a first plurality of die bonding pads arranged along at least one first edge thereof. A plurality of bonding pillars extends substantially vertically from the substrate bonding pads. Each bonding pillar electrically connects one of the first plurality of substrate bonding pads to a corresponding one of the first plurality of die bonding pads. A method of assembling a semiconductor device is also described.
    Type: Application
    Filed: April 18, 2011
    Publication date: December 8, 2011
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventor: Roland SCHUETZ
  • Publication number: 20110276775
    Abstract: A composite memory device including discrete memory devices and a bridge device for controlling the discrete memory devices in response to global memory control signals having a format or protocol that is incompatible with the memory devices. The discrete memory devices can be commercial off-the-shelf memory devices or custom memory devices which respond to native, or local memory control signals. The global and local memory control signals include commands and command signals each having different formats. The composite memory device includes a system in package including the semiconductor dies of the discrete memory devices and the bridge device, or can include a printed circuit board having packaged discrete memory devices and a packaged bridge device mounted thereto.
    Type: Application
    Filed: May 6, 2011
    Publication date: November 10, 2011
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventor: Roland SCHUETZ
  • Publication number: 20110258366
    Abstract: Status indication in a system having a plurality of memory devices is disclosed. A memory device in the system includes a plurality of data pins for connection to a data bus. The memory device also includes a status pin for connection to a status line that is independent from the data bus. The memory device also includes first circuitry for generating, upon completion of a memory operation having a first duration, a strobe pulse of a second duration much shorter than the first duration. The strobe pulse provides an indication of the completion of the memory operation. The memory device also includes second circuitry for outputting the strobe pulse onto the status line via the status pin.
    Type: Application
    Filed: February 9, 2011
    Publication date: October 20, 2011
    Applicant: MOSAID Technologies Incorporated
    Inventors: Roland Schuetz, HakJune Oh, Hong Beom Pyeon
  • Publication number: 20110096614
    Abstract: An arrangement of memory devices and a controller is based on an interface with a reduced pin count relative to a known memory device and controller arrangement. Facilitating the reduced pin count interface the reduction of multiple strobe signal to a single strobe signal. In addition, a packet header transmitted on the data bus followed by a payload, includes an encoded indication of the type of the payload. Aspects of the present application relate to providing a traditional memory device with external logic devices, where the logic devices handle the single strobe and the packet header, thereby permitting single strobe operation.
    Type: Application
    Filed: January 5, 2011
    Publication date: April 28, 2011
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventors: Roland Schuetz, Jin-Ki Kim
  • Publication number: 20110090004
    Abstract: Through silicon vias (TSVs) in a stacked multi-die integrated circuit package are controlled to assume different connection configurations as desired during field operation of the package in its normal mission mode. TSV connections may be reconfigured to connect an affected die in a manner different from, for example, a factory default connection of that die. TSV connections to the inputs and/or outputs of a die's native circuitry may be changed. A die may be disconnected altogether from an interface that interconnects dice in the stack, or a die that was originally disconnected from such an interface may be connected to the interface.
    Type: Application
    Filed: May 4, 2010
    Publication date: April 21, 2011
    Applicant: Mosaid Technologies Incorporated
    Inventor: Roland Schuetz
  • Publication number: 20110060937
    Abstract: A method of identifying at least one anomalous device in a configuration of series-connected semiconductor devices, comprising: selecting a device in the configuration; sending a command to the selected device, the command for placing the selected device into a recovery mode of operation; attempting to elicit identification data from the selected device while in the recovery mode of operation; if the attempt is successful, selecting a next device in the configuration of series-connected semiconductor devices and repeating the sending and the attempting to elicit; and if the attempt is unsuccessful, concluding that the selected device is an anomalous device.
    Type: Application
    Filed: November 12, 2010
    Publication date: March 10, 2011
    Inventor: Roland SCHUETZ
  • Patent number: 7889578
    Abstract: An arrangement of memory devices and a controller is based on an interface with a reduced pin count relative to a known memory device and controller arrangement. Facilitating the reduced pin count interface the reduction of multiple strobe signal to a single strobe signal. In addition, a packet header transmitted on the data bus followed by a payload, includes an encoded indication of the type of the payload. Aspects of the present application relate to providing a traditional memory device with external logic devices, where the logic devices handle the single strobe and the packet header, thereby permitting single strobe operation.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: February 15, 2011
    Assignee: MOSAID Technologies Incorporated
    Inventors: Roland Schuetz, Jin-Ki Kim
  • Publication number: 20100296256
    Abstract: A configurable memory subsystem includes a memory module with a circuit board having a first and a second memory-containing device (MCD) pair mounted thereto. Each MCD pair has a first MCD in communication with a second MCD. Each MCD has an input port, an output port, and a memory each communicating with a bridge. In response to a command, the bridge transfers at least one of a portion of a data packet from the input port to the output port or to the memory, or transfers a portion of a memory packet from the memory to the output port. A loop-back device receives the command and the data packet form the first MCD pair and transmits the command and data packet to the second MCD pair.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 25, 2010
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventors: Peter Gillingham, Roland Schuetz
  • Patent number: 7836340
    Abstract: A method of identifying at least one anomalous device in a configuration of series-connected semiconductor devices, comprising: selecting a device in the configuration; sending a command to the selected device, the command for placing the selected device into a recovery mode of operation; attempting to elicit identification data from the selected device while in the recovery mode of operation; if the attempt is successful, selecting a next device in the configuration of series-connected semiconductor devices and repeating the sending and the attempting to elicit; and if the attempt is unsuccessful, concluding that the selected device is an anomalous device.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: November 16, 2010
    Assignee: Mosaid Technologies Incorporated
    Inventor: Roland Schuetz
  • Publication number: 20090129184
    Abstract: A method of identifying at least one anomalous device in a configuration of series-connected semiconductor devices, comprising: selecting a device in the configuration; sending a command to the selected device, the command for placing the selected device into a recovery mode of operation; attempting to elicit identification data from the selected device while in the recovery mode of operation; if the attempt is successful, selecting a next device in the configuration of series-connected semiconductor devices and repeating the sending and the attempting to elicit; and if the attempt is unsuccessful, concluding that the selected device is an anomalous device.
    Type: Application
    Filed: November 16, 2007
    Publication date: May 21, 2009
    Inventor: Roland SCHUETZ
  • Publication number: 20090103378
    Abstract: An arrangement of memory devices and a controller is based on an interface with a reduced pin count relative to a known memory device and controller arrangement. Facilitating the reduced pin count interface the reduction of multiple strobe signal to a single strobe signal. In addition, a packet header transmitted on the data bus followed by a payload, includes an encoded indication of the type of the payload. Aspects of the present application relate to providing a traditional memory device with external logic devices, where the logic devices handle the single strobe and the packet header, thereby permitting single strobe operation.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 23, 2009
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventors: Roland Schuetz, Jin-Ki Kim
  • Publication number: 20080201548
    Abstract: A system having serially connected memory devices in a ring topology organization to realize high speed performance. The memory devices have dynamically configurable data widths such that the system can operate with up to a maximum common number of active data pads to maximize performance, or to operate with a single active data pad to minimize power consumption. Therefore the system can include a mix of memory devices having different data widths. The memory devices are dynamically configurable through the issuance of a single command propagated serially through all the memory devices from the memory controller in a broadcast operation. Robust operation of the system is ensured by implementing a data output inhibit algorithm, which prevents valid data from being provided to the memory controller when read output control signal is received out of its proper sequence.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 21, 2008
    Applicant: MOSAID TECHNOLOGIES INCORPORATED
    Inventors: Steven PRZYBYLSKI, Roland SCHUETZ, HakJune OH, Hong Beom PYEON