Patents by Inventor Roland Van WEGBERG

Roland Van WEGBERG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200187788
    Abstract: A device for read-out of a photoplethysmography (PPG) signal comprises: a photodiode, which is configured to detect a PPG signal, the photodiode comprising a first and a second terminal; and a read-out circuitry for reading out the PPG signal, wherein an input stage is connected to receive a first and a second input signal from the terminals and a DC bias voltage, and wherein the input stage is configured for current sensing to provide a fully differential amplification of the input signals to a first and a second current signal, and wherein an output stage is configured to receive the current signals, wherein the current signals comprise an AC and a DC component of the PPG signal, and wherein the output stage is configured to generate a differential output voltage through a gain component.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 18, 2020
    Inventors: Shuang SONG, Jiawei XU, Roland Van WEGBERG, Nick Van HELLEPUTTE
  • Publication number: 20200187811
    Abstract: A read-out circuitry for acquiring a multi-channel biopotential signal, comprises: a plurality of read-out signal channels, each receiving an input signal from a unique signal electrode; a reference channel receiving a reference signal from a reference electrode; wherein each read-out signal channel and the reference channel comprises a channel amplifier connected to receive the input signal in a first input node and with an output node connected to a second input node via a channel feedback loop; wherein each signal channel amplifier comprises a capacitor between the second input nodes of the signal channel amplifier and the reference channel amplifier, and wherein each signal channel feedback loop and the reference channel feedback loop comprise a filter.
    Type: Application
    Filed: December 11, 2019
    Publication date: June 18, 2020
    Inventors: Roland Van Wegberg, Wim Sijbers
  • Patent number: 10686464
    Abstract: A latched comparator comprises a pre-amplifier stage with a positive input (Vin,p), a negative input (Vin,n); and a differential output (?Vout) comprising a first output (Vout,1) and a second output (Vout,2), the pre-amplifier stage comprising a first cascode pair, comprising a first amplifying transistor (MN2) and a first cascode transistor (MN4) connected at a first cascode node, the first amplifying transistor (MN2) being controlled by the positive input (Vin,p) and the first cascode transistor (MN4) being connected, opposite to the first cascode node, to the first output (Vout,1); a second cascode pair, comprising a second amplifying transistor (MN3) and a second cascode transistor (MN5) connected at a second cascode node, the second amplifying transistor (MN3) being controlled by the negative input (Vin,n) and the second cascode transistor (MN5) being connected, opposite to the second cascode node, to the second output (Vout,2); a first gain-boosting transistor (MN6) connected between the first output (V
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: June 16, 2020
    Assignee: STICHTING IMEC NEDERLAND
    Inventor: Roland Van Wegberg
  • Publication number: 20200021304
    Abstract: A latched comparator comprises a pre-amplifier stage with a positive input (Vin,p), a negative input (Vin,n); and a differential output (?Vout) comprising a first output (Vout,1) and a second output (Vout,2), the pre-amplifier stage comprising a first cascode pair, comprising a first amplifying transistor (MN2) and a first cascode transistor (MN4) connected at a first cascode node, the first amplifying transistor (MN2) being controlled by the positive input (Vin,p) and the first cascode transistor (MN4) being connected, opposite to the first cascode node, to the first output (Vout,1); a second cascode pair, comprising a second amplifying transistor (MN3) and a second cascode transistor (MN5) connected at a second cascode node, the second amplifying transistor (MN3) being controlled by the negative input (Vin,n) and the second cascode transistor (MN5) being connected, opposite to the second cascode node, to the second output (Vout,2); a first gain-boosting transistor (MN6) connected between the first output (V
    Type: Application
    Filed: July 10, 2019
    Publication date: January 16, 2020
    Inventor: Roland Van WEGBERG